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AD9725 Datasheet(PDF) 7 Page - Analog Devices

Part # AD9725
Description  14-Bit, 600 MSPS D/A Converter
PDF  16 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9725 Datasheet(HTML) 7 Page - Analog Devices

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Preliminary Technical Data
AD9725
Rev. PrA | Page 7 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
FSADJ
REFIO
RESET
CSB
SCLK/SYNC_UPD
SDO/SYNC_ALRM
DGND
DVDD
DB2–
DB2+
DBGND
CLKVDD
REXT
CLKVDD
CLKGND
CLK+
CLK–
CLKGND
DGND
DVDD
DB13+
DB13–
DB12+
DB11+
DB10+
DB1–
DB1+
DB0–
DB0+
NC
NC
NC
NC
DB12–
DB11–
DB10–
DB9+
DB9–
DBVDD
SDIO
AD9725
TOP VIEW
(Not to Scale)
PIN 1
IDENTIFIER
Figure 4. Pin Configuration
Table 4. Pin Function Description
Pin
No.
Name
Description
Pin
No.
Name
Description
1
CLKVDD
Clock Supply Voltage
41
DBGND
Digital Data Supply Common
2
REXT
Bias Resistor. Sets DATACLK_OUT drive
strength. Nominally 1 k
Ω to DBGND
42
DB2+
Digital Input Bit 2–True
3
CLKVDD
Clock Supply Voltage
43
DB2–
Digital Input Bit 2–Complement
4
CLKGND
Clock Supply Common
44
DB1+
Digital Input Bit 1–True
5
CLK+
Clock Input–True
45
DB1–
Digital Input Bit 1–Complement
6
CLK–
Clock Input–Complement
46
DB0+
Digital Input Bit 0–True
7
CLKGND
Clock Supply Common
47
DB0–
Digital Input Bit 0–Complement
8
DGND
Digital Common
48
NC
No Connect
9
DVDD
Digital Supply Voltage
49
NC
No Connect
10
DB13+
Digital Input Bit 13–True
50
NC
No Connect
11
DB13–
Digital Input Bit 13–Complement
51
NC
No Connect
12
DB12+
Digital Input Bit 12–True
52
DVDD
Digital Supply Voltage
13
DB12–
Digital Input Bit 12–Complement
53
DGND
Digital Common
14
DB11+
Digital Input Bit 11–True
54
SDO/SYNC_ALRM
SPI_DIS = 1: Data/Clock
Synchronization Alarm
15
DB11–
Digital Input Bit 11–Complement
55
SDIO
SPI Serial Data Input/Output
16
DB10+
Digital Input Bit 10–True
56
SCLK/SYNC_UPD
SPI_DIS = 1: Data/Clock
Synchronization Update Required
17
DB10–
Digital Input Bit 10–Complement
57
CSB
SPI Chip Select (Active Low)
18
DB9+
Digital Input Bit 9–True
58
RESET
Hardware Reset
19
DB9–
Digital Input Bit 9–Complement
59
REFIO
Reference Output, 1.2 V Nominal
20
DBVDD
Digital Data Supply Voltage
60
FSADJ
Full-Scale Current Adjust



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