AD9725 datasheet(3/16 Pages) AD

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Preliminary Technical Data

AD9725

Rev. PrA | Page 3 of 16

SPECIFICATIONS

DC SPECIFICATIONS

Table 1. TMIN to TMAX, AVDD1, AVDD2, DBVDD = 3.3 V, ADVDD, ACVDD, CLKVDD, DVDD = 2.5 V, IOUTFS = 20 mA, unless

otherwise noted. Specifications subject to change without notice

Parameter

Min

Typ

Max

Unit

Resolution

Bits

DC Accuracy

Integral Nonlinearity

±1.5

LSB

Differential Nonlinearity

±0.75

LSB

Analog Output

Offset Error

–1

%FSR

Gain Error

%FSR

Full Scale Output Current

1.26

Output Compliance Range

1.14

Output Resistance

TBD

1.25

Output Capacitance

0.1

TBD

Reference Output

Reference Voltage

1.2

Reference Output Current

100

Reference Input

Reference Input Compliance Range

Reference Input Resistance

Small Signal Bandwidth

0.5

MHz

Temperature Coefficients

Offset Drift

TBD

ppm of FSR/ºC

Gain Drift (With Internal Reference)

TBD

ppm of FSR/ºC

Reference Voltage Drift

TBD

ppm/ºC

Power Supply1

AVDD1, AVDD2

Voltage Range

3.3

Analog Supply Current (IAVDD1 + IAVDD2)

ADVDD

Voltage Range

2.5

ACVDD

Voltage Range

2.5

Analog Supply Current ( IADVDD + IACVDD)

CLKVDD

Voltage Range

2.5

Clock Supply Current (ICLKVDD)

DVDD

Voltage Range

2.5

Digital Supply Current (IDVDD)

DBVDD

Voltage Range

3.3

Digital Supply Current (IDBVDD)

Nominal Power Dissipation (PDIS)2

479

Nominal Power Dissipation (PDIS)3

1000

1Supply currents measured under the following conditions: fDAC = 200 MSPS, fOUT = 11 MHz, nominal power supply voltages

2Power dissipation measured under the following conditions: fDAC = 200 MSPS, fOUT = 11 MHz, nominal power supply voltages

3Power dissipation measured under the following conditions: fDAC = 600 MSPS, fOUT = 111 MHz, nominal power supply voltages

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