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TTP258 Datasheet(PDF) 13 Page - Tontek Design Technology |
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TTP258 Datasheet(HTML) 13 Page - Tontek Design Technology |
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13 / 44 page ![]() Preliminary TTP258 TonTouch TM 16’/04/06 Page 13 of 44 Ver.: 1.2 S-6: Watch Dog Timer (WDT) The clock of watchdog timer comes from time base overflow (TB1OV). User can use the time up signal to prevent a software malfunction or abnormal sequence from jumping to an unknown memory location causing a system fatal failure. Normally, if the watchdog timer time up signal active that will reset the chip. At the same time, program and hardware can be initialized and resume system under normal operation. The chip also provides 2 steps clear watchdog command as the programmer writes INTF with $F data first that will enable the WDT clear, and then writes clear WDT 2nd register ($303H) after. Completely finishes the two write & read steps will clear the watchdog timer. User should well arrange the two command steps for avoiding the dead lock loop. User should keep in minds that always reset WDT at main program and never clear the WDT in the interrupt routine. The max period of WDT =(TB1OV cycle time) * 8 S-7: Low Voltage Reset (LVR) The low voltage reset (LVR) forces the MCU in reset state during power failure, especially as MCU working in AC power application, preventing from abnormal state is the key issue. The control bit LVREN is in independent register. It can prevent LVREN change by unexpected program. The LVR can select always on or control by register by metal trim and LVR voltage is 2.2V. Q QB WDT Overflow TFF TFF TFF POR+RESET SLEEP INTF write $F first then Write $303H after DFF TB1OV as clock Figure: Watch Dog Timer control circuit Write INTF first & Write $303H after |
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