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TTP258 Datasheet(PDF) 21 Page - Tontek Design Technology |
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TTP258 Datasheet(HTML) 21 Page - Tontek Design Technology |
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21 / 44 page ![]() Preliminary TTP258 TonTouch TM 16’/04/06 Page 21 of 44 Ver.: 1.2 P-3: 8 bits Timer/Counter (TCP) for TCP1 One 8-bit timer/counters (TCP) with 4 kind clock sources and preload data buffer can implement as a timer or counter feature. The clock sources of TCP1 are selected by TCP1S0 & TCP1S1 two bits of the timer control registers (TCP1C). TCP1OV is the timer or counter overflow signal and the rising edge will set the relative INT flag. TCP1C[200H]: TCP1 Timer/counter control register[R/W], default value [0000] Register Bit3 Bit2 Bit1 Bit0 Bit Name TCP1LD TCP1S1 TCP1S0 TCP1EN Read/Write R/W R/W R/W R/W TCP1EN: TCP1 counting enabled. (0: disable; 1: enable) TCP1LD: TCP1 auto-reload enabled. (0: disable; 1: enable) TCP1S1 & TCP1S0: TCP1 clock source selection bits. TCP1S1 TCP1S0 Selected Clock source 0 0 CK0 0 1 CK1 1 0 CK2 1 1 CK3 TCP1L[201H]: TCP1 low nibble data register[R/W], default value [0000] Register Bit3 Bit2 Bit1 Bit0 Bit Name TCP1_3/TCP1D3 TCP1_2/TCP1D2 TCP1_1/TCP1D1 TCP1_0/TCP1D0 Read/Write R/W R/W R/W R/W TCP1_3~TCP1_0: reading the counter low nibble data. TCP1D3~TCP1D0: writing TCP1D low nibble of data buffer. TCP1H[202H]: TCP1 high nibble data register[R/W], default value [0000] Register Bit3 Bit2 Bit1 Bit0 Bit Name TCP1_7/TCP1D7 TCP1_6/TCP1D6 TCP1_5/TCP1D5 TCP1_4/TCP1D4 Read/Write R/W R/W R/W R/W TCP1_7~TCP1_4: reading the counter high nibble data. TCP1D7~TCP1D4: writing TCP1D high nibble of data buffer. * TCP1D: Like a 8 bit TCP1 data register[R/W], default value [00H] TCP1D Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Bit Name TCP1D7 TCP1D6 TCP1D5 TCP1D4 TCP1D3 TCP1D2 TCP1D1 TCP1D0 The special R/W function for TCP1 has different Target, AS writing TCP1H/L registers that are updating preload data of the TCP1D. As read TCP1H/L registers that are the brand new TCP1 counter value. |
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