G -LINK

GLT41316

64K X 16 CMOS DYNAMIC RAM WITH FAST PAGE MODE

June 1998 (Rev 2)

G-Link Technology Corporation

2701Northwestern Parkway

Santa Clara, CA 95051, U.S.A.

G-Link Technology Corporation, Taiwan

2F, No.12, R&D Rd. II, Science-Based Industrial Park,

Hsin Chu, Taiwan, R.O.C.

- 4 -

Truth Table: GLT41316

Function

RAS

CAS

UW

LW

OE

ADDRESS

DQs

Note

s

Standby

H

H

→X

X

X

X

High-Z

Read: Word

L

L

H

H

L

ROW/COL Data Out

Write: Word(Early Write)

L

L

L

L

X

ROW/COL Data-In

Write: Lower Byte (Early)

L

L

H

L

X

ROW/COL Lower Byte,Data-In

Upper Byte,High-Z

Write: Upper Byte (Early)

L

L

L

H

X

ROW/COL Lower Byte,High-Z

Upper Byte,Data-In

Read Write

L

L

H

→L

H

→L

L

→H ROW/COL Data-Out,Data-In

1,2

Fast-Page-

Mode Read

1st Cycle

2nd Cycle

L

L

H

→L

H

→L

H

H

H

L

L

ROW/COL

COL

Data-Out

Data-Out

1

1

Fast-Page-

Mode Write

1st Cycle

2nd Cycle

L

L

H

→L

H

→L

L

L

L

L

X

X

ROW/COL

COL

Data-In

Data-In

2

2

Fast-Page-

Mode Read-

Write

1st Cycle

2nd Cycle

L

L

H

→L

H

→L

H

→L

H

→L

H

→L

H

→L

L

→H

L

→H

ROW/COL

COL

Data-Out,Data-In

Data-Out,Data-In

1,2

1,2

Hidden

Refresh

Read

Write

L

→H→L

L

→H→L

L

L

H

L

H

L

L

X

ROW/COL

ROW/COL

Data-Out

Data-In

1

2,3

RAS -Only Refresh

L

H

X

X

X

ROW

High-Z

CBR Refresh

H

→L

L

X

X

X

High-Z

Notes:

1. These READ cycles are always WORD READ cycles .

2. These WRITE cycles may also be BYTE READ cycles (either UW or LW active).

3. EARLY WRITE only.