USBN9604SLB datasheet(17/60 Pages) NSC

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4.0 Direct Memory Access (DMA) Support (Continued)

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4.2

AUTOMATIC DMA MODE (ADMA)

The ADMA mode allows the CPU to transfer independently large bulk or isochronous data streams to or from the USB bus.

The application’s DMA controller, together with the ADMA logic, have the capability to split a large amount of data and trans-

fer it in (FIFO size) packets via the USB. In addition, automatic error handling is performed in order to minimize firmware

intervention. The number of transferred data stream bytes must be of a modulo 64 size. The maximum amount of data is

restricted to 256*64 bytes = 16 Kbytes.

To enable an ADMA transfer, the following steps must be performed:

1. The local CPU programs the DMA controller for fly-by demand mode transfers. In this mode, transfers occur only in re-

sponse to DMA request via the DRQ pin. The data is read/written from/to the receive/transmit FIFO and written/read in-

to/from local memory during the same bus transaction.

2. The DMA address counter is programmed to point to the destination memory block in the local shared memory, and the

Byte Count register is programmed with the number of bytes in the block to be transferred. The DMA Count register must

be configured with the number of packets to be received or transmitted. If required, the Automatic Error Handling register

must also be configured at this time.

3. The ADMA enable bit must be set prior to, or at the same time as the DMA enable bit. The DMA enable bit must be

cleared before enabling ADMA mode.

4. The DMA Request Enable bit and DMA Source bits are set in the device.The respective endpoint Enable bit must also

be set.

5. The USB host can now perform USB bulk or isochronous data transfers over the USB bus to the receive FIFO or from

the transmit FIFO. Steps 5 to 7 of the normal DMA mode are perfromed automatically. The ADMA is stopped either when

the last packet is received or when the DMA Count register has reached the value zero.

See Figures 10 and 11 for the transmit and receive sequences using ADMA mode. See Figures 12 and 13 for the basic

DMA write timing and read timing.

Set up ADMA

Microcontroller

Transaction

USB

Fill FIFO

DMA

Fill FIFO

USB

Transaction

USB

Last

Figure 10. Transmit Operation Using ADMA Mode

time

Transaction

Set up ADMA

Microcontroller

Transaction

USB

Read FIFO

DMA

Read FIFO

USB

Transaction

Last

Figure 11. Receive Operation Using ADMA Mode

DMA

time

Read FIFO

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