CC1100-RTR1 datasheet(53/100 Pages) TI1

53 / 100 page

CC1100

SWRS038D

Page 53 of 92

-20.0

-10.0

0.0

10.0

20.0

30.0

40.0

50.0

-2.3

1.5

-1.0

-0.8

0.0

0.8

1.0

1.5

2.3

Fre que ncy offse t [MHz]

Figure 27: Typical Selectivity at 250 kBaud Data Rate, 868 MHz, MSK, IF Frequency is 254 kHz

and the Digital Channel Filter Bandwidth is 540 kHz

Crystal Oscillator

A crystal in the frequency range 26-27 MHz

must be connected between the XOSC_Q1

and XOSC_Q2 pins. The oscillator is designed

for parallel mode operation of the crystal. In

addition, loading capacitors (C81 and C101)

for the crystal are required. The loading

capacitor values depend on the total load

capacitance, CL, specified for the crystal. The

total load capacitance seen between the

crystal terminals should equal CL for the

crystal to oscillate at the specified frequency.

parasitic

101

The parasitic capacitance is constituted by pin

input capacitance and PCB stray capacitance.

Total parasitic capacitance is typically 2.5 pF.

The crystal oscillator circuit is shown in Figure

28. Typical component values for different

values of CL are given in Table 33.

The crystal oscillator is amplitude regulated.

This means that a high current is used to start

up the oscillations. When the amplitude builds

up, the current is reduced to what is necessary

to maintain approximately 0.4 Vpp signal

swing. This ensures a fast start-up, and keeps

the drive level to a minimum. The ESR of the

crystal should be within the specification in

order to ensure a reliable start-up (see Section

4.4 on page 14).

The initial tolerance, temperature drift, aging

and load pulling should be carefully specified

in order to meet the required frequency

accuracy in a certain application.

XOSC_Q1

XOSC_Q2

XTAL

C81

C101

Figure 28: Crystal Oscillator Circuit

Component

CL = 10 pF

CL = 13 pF

CL = 16 pF

C81

15 pF

22 pF

27 pF

C101

15 pF

22 pF

27 pF

Table 33: Crystal Oscillator Component Values

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