CC1100-RTR1 datasheet(91/100 Pages) TI1

91 / 100 page

CC1100

SWRS038D

Page 91 of 92

General Information

37.1 Document History

Revision

Date

Description/Changes

SWRS038D

2009-05-26 Updated packet and ordering information.

Removed Product Status Definition, Address Information and TI World Wide Support section.

Removed Low-Cost from datasheet title.

SWRS038C

2008-05-22 Added product information on front page

SWRS038B

2007-07-09 Added info to ordering information

Changes in the General Principle of Matrix Interleaving figure.

Changes in Table: Bill Of Materials for the Application Circuit

Changes in Figure: Typical Application and Evaluation Circuit 868/915 MHz

Changed the equation for channel spacing in the MDMCFG0 register.

kbps replaced by kBaud throughout the document.

Some of the sections have been re-written to be easier to read without having any new info

added.

Absolute maximum supply voltage rating increased from 3.6 V to 3.9 V.

Changed the frequency accuracy after calibration for the low power RC oscillator from ±0.3 to

±1 %.

Updates to sensitivity and current consumption numbers listed under Key Features.

FSK changed to 2-FSK throughout the document.

Updates to the Abbreviation table.

Updates to the Electrical Specifications section.

Added info about RX and TX latency.

Added info in the Pinout Overview table regarding GDO0 and GDO2.

Changed current consumption in RX and TX in the simplified state diagram.

Added info about default values after reset vs. optimum register settings in the Configuration

Software

section

Changes to the SPI Interface Timing Requirements.

Info added about tsp,pd

The following figures have been changed: Configuration Registers Write and Read Operations,

SRES Command Strobe

, and Register Access Types.

In the Register Access section, the address range is changed.

In the PATABLE Access section, info is added regarding limitations on output power

programming when using PA ramping.

In the Packet Format section, preamble pattern is changed to 10101010 and info about bug

related to turning off the transmitter in infinite packet length mode is added.

Added info to the Frequency Offset Compensation section.

Added info about the initial value of the PN9 sequence in the Data Whitening section.

In the Packet Handling in Transmit Mode section, info about TX FIFO underflow state is added.

Added section Packet Handling in Firmware.

0x00 is added as a valid PATABLE setting in addition to 0x30-0x3F when using ASK.

In the PQT section a change is made as to how much the counter decreases.

The RSSI value is in dBm and not dB.

The whole CS Absolute Threshold section has been re-written and the equation calculating the

threshold has been removed.

Added info in the CCA section on what happens if the channel is not clear.

Added info to the LQI section for better understanding.

Removed all references to the voltage regulator in relation with the CHP_RDYn signal, as this

signal is only related to the crystal.

Removed references to the voltage regulator in the figures: Power-On Reset and Power-On

Reset with SRES

. Changes to the SI line in the Power-On Reset with SRES figure

Added info on the three automatic calibration options.

Removed the autosync feature from the WOR section and added info on how to exit WOR

mode. Also added info about minimum sleep time and references to App. Note 047 together

with info about calibration of the RC oscillator.

The figure: Event 0 and Event 1 Relationship is changed for better readability.

Info added to the Timing section related to reduced calibration time.

The Output Power Programming section is divided into 2 new sections; Output Power

Programming

and Shaping and PA Ramping.

Added info on programming of PATABLE when using OOK, and about PATABLE when entering

SLEEP mode.

2 new figures added to the Shaping and PA Ramping section: Shaping of ASK Signal and PA

Ramping

, together with one new table: PATABLE Settings Used Together with ASK Shaping

and PA Ramping

Changed made to current consumption in the Optimum PATABLE Settings for Various Output

Power Levels and Frequency Bands

table.

Added section Layout Recommendations.

In section General Purpose / Test Output Control Pins: Added info on GDO pins in SLEEP

CC1100-RTR1 Datasheet(PDF) 91 Page - Texas Instruments

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