AM1802 datasheet(96/182 Pages) TI1

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AM1802

SPRS710E – NOVEMBER 2010 – REVISED MARCH 2014

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6.11.3.11 DDR2/mDDR CK and ADDR_CTRL Routing

Figure 6-21 shows the topology of the routing for the CK and ADDR_CTRL net classes. The route is a

balanced T as it is intended that the length of segments B and C be equal. In addition, the length of A

should be maximized.

Figure 6-21. CK and ADDR_CTRL Routing and Topology

Table 6-34. CK and ADDR_CTRL Routing Specification

NO.

PARAMETER

MIN

TYP

MAX

UNIT

Center to Center CK-CKN Spacing(1)

2w(2)

CK A to B/A to C Skew Length Mismatch(3)

Mils

CK B to C Skew Length Mismatch

Mils

Center to center CK to other DDR2/mDDR trace spacing(1)

4w(2)

CK/ADDR_CTRL nominal trace length(4)

CACLM-50

CACLM

CACLM+50

Mils

ADDR_CTRL to CK Skew Length Mismatch

100

Mils

ADDR_CTRL to ADDR_CTRL Skew Length Mismatch

100

Mils

Center to center ADDR_CTRL to other DDR2/mDDR trace spacing(1)

4w(2)

Center to center ADDR_CTRL to other ADDR_CTRL trace spacing(1)

3w (2)

ADDR_CTRL A to B/A to C Skew Length Mismatch (3)

100

Mils

ADDR_CTRL B to C Skew Length Mismatch

100

Mils

(1)

Center to center spacing is allowed to fall to minimum (w) for up to 500 mils of routed length to accommodate BGA escape and routing

congestion.

(2)

w = PCB trace width as defined in Table 6-27.

(3)

Series terminator, if used, should be located closest to device.

(4)

CACLM is the longest Manhattan distance of the CK and ADDR_CTRL net classes.

Peripheral Information and Electrical Specifications

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