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DEVICE INFORMATION

R A

1

R A

2

R

A

2_3

R A

3

V

A

REF

DGND

LDAC

DACA/B

NC

DB11

R B

1

R B

2

R

B

2_3

R B

3

V

B

REF

V

DD

CLR

R/W

CS

DB0

1

2

3

4

5

6

7

8

9

10

30

29

28

27

26

25

24

23

22

21

DAC7822

DAC7822

SBAS374A – JUNE 2006 – REVISED JULY 2007

RTA PACKAGE

QFN-40

(TOP VIEW)

TERMINAL FUNCTIONS

PIN NO.

PIN NAME

DESCRIPTION

DAC A 4-Quadrant Resistors. Allows a number of configuration modes, including bipolar operation with

1-4

minimum of external components.

5, 26

DAC Reference Voltage Input Terminals.

6

DGND

Digital Ground Pin.

Load DAC Input. Allows asynchronous or synchronous updates to the DAC output. The DAC is asynchronously

7

LDAC

updated when this signal goes low. Alternatively, if this line is held permanently low, an automatic or

synchronous update mode is selected whereby the DAC is updated on the rising edge of CS.

8

DAC A/B

Selects DAC A or B. Low selects DAC A, and high selects DAC B.

9, 34-37

NC

Not internally connected.

10-21

DB11 to DB0

Parallel Data Bits 11 through 0.

Chip Select Input; active low. Used in conjuction with R/W to load parallel data to the input latch or to read data

22

CS

from the DAC register. Edge sensitive; when pulled high, the DAC data is latched.

Read/Write. When low, used in conjunction with CS to load parallel data. When high, used in conjunction with

23

R/W

CS to read back contents of DAC register.

24

CLR

Active Low Control Input. Clears DAC output and input and DAC registers.

25

Positive Power Supply Input. These parts can be operated from a supply of 2.5V to 5.5V.

DAC B 4-Quadrant Resistors. Allow a number of configuration modes, including bipolar operation with a

27-30

minimum of external components.

31, 40

External Amplifier Output.

DAC A Analog Ground. This pin typically should be tied to the analog ground of the system, but can be biased

32

to achieve single-supply operation.

33

DAC B Current Output.

38

DAC A Current Output.

DAC A Analog Ground. This pin typically should be tied to the analog ground of the system, but can be biased

39

to achieve single-supply operation.

5

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