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AD5641

Preliminary Technical Data

Rev. PrC | Page 16 of 20

USING AD5641 WITH AN OPTO-ISOLATED

INTERFACE

In process-control applications in industrial environments, it is

often necessary to use an opto-isolated interface to protect and

isolate the controlling circuitry from any hazardous common-

mode voltages that might occur in the area where the DAC is

functioning. Opto-isolators provide isolation in excess of 3 kV.

Because the AD5641 uses a 3-wire serial logic interface, it

requires only three opto-isolators to provide the required

isolation (see Figure 36). The power supply to the part also

needs to be isolated. This is done by using a transformer. On the

DAC side of the transformer, a 5 V regulator provides the 5 V

supply required for the AD5641.

0.1

µF

10k

Ω

10k

Ω

10k

Ω

+5V

REGULATOR

VOUT

GND

DIN

SYNC

SCLK

POWER

µF

SYNC

SCLK

DATA

AD5641

Figure 36. AD5641 with an Opto-Isolated Interface

POWER SUPPLY BYPASSING AND GROUNDING

When accuracy is important in a circuit, it is helpful to carefully

consider the power supply and ground return layout on the

board. The printed circuit board containing the AD5641 should

have separate analog and digital sections, each having its own

area of the board. If the AD5641 is in a system where other

devices require an AGND to DGND connection, the connection

should be made at one point only. This ground point should be

as close to the AD5641 as possible.

The power supply to the AD5641 should be bypassed with

10 µF and 0.1 µF capacitors. The capacitors should be physically

as close as possible to the device, with the 0.1 µF capacitor

ideally right up against the device. The 10 µF capacitors are the

tantalum bead type. It is important that the 0.1 µF capacitor

have low effective series resistance (ESR) and effective series

inductance (ESI), such as in common ceramic types of capaci-

tors. This 0.1 µF capacitor provides a low impedance path to

ground for high frequencies caused by transient currents due to

internal logic switching.

The power supply line itself should have as large a trace as

possible to provide a low impedance path and reduce glitch

effects on the supply line. Clocks and other fast switching digital

signals should be shielded from other parts of the board by

digital ground. Avoid crossover of digital and analog signals, if

possible. When traces cross on opposite sides of the board,

ensure that they run at right angles to each other to reduce

feedthrough effects through the board. The best board layout

technique is the microstrip technique where the component

side of the board is dedicated to the ground plane only and the

signal traces are placed on the solder side. However, this is not

always possible with a 2-layer board.

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