REV. 0

AD9860/AD9862

–17–

Blank Registers

Blank registers, i.e., the registers with 0 settings and no indicated

function, are placeholders used throughout the register map for

spacing the AD9860/AD9862 control bits in a logic fashion and,

potentially can be used for future development. A low should

always be written to these registers if a write needs to take place.

SERIAL PORT INTERFACE

The Serial Port Interface (SPI) is used to write to and read from

the AD9860/AD9862 internal programmable registers. The serial

interface uses four pins: SEN, SCLK, SDIO, and SDO by default.

SEN is a serial port enable pin, SCLK is the serial clock pin,

SDIO is a bidirectional data line and SDO is a serial output pin.

SEN is an active low control gating read and write cycles. When

SEN is high, SDO and SDIO are three-stated.

SCLK is used to synchronize SPI read and writes at a maximum

bit rate of 16 MHz. Input data is registered on the rising edge and

output data transitions on the falling edge. During write opera-

tions, the registers are updated after the 16th rising clock edge

(and 24th rising clock edge for the dual byte case). Incomplete

write operations are ignored.

SDIO is an input only by default. Optionally, a 3-pin interface may

be configured using the SDIO for both input and output opera-

tions and three-stating the SDO pin (see SDIO BiDir register).

SDO is a serial output pin used for read back operations in 4-wire mode

and is three-stated when SDIO is configured for bidirectional operation.

Instruction Header

Each SPI read or write consists of an instruction header and

data. The instruction header is made up of an 8-bit word and is

used to set up the register data transfer. The 8-bit word consists

of a read/not write bit, R/nW (the MSB), followed by a double/

not single bit (2/n1) and the 6-bit register address.

Write Operations

The SPI write operation uses the instruction header to configure

a one or two register write using the 2/n1 bit. The instruction

byte followed by the register data, is written serially into the

device through the SDIO pin on rising edges of the interface

clock at SCLK. The data can be transferred MSB first or LSB first

depending on the setting of the LSB First register.

Figure 1 includes a few examples of writing data into the device.

Figure 1a shows a write using 1 Byte and MSB First mode set;

Figure 1b shows an MSB first, 2 Byte write; and Figure 1c

shows an LSB first, 2 Byte write. Note the differences between

LSB and MSB First modes: instruction header and data are

reversed, and in 2 Byte writes, the first data byte is written to

the address in the header, N and the second data byte is written

to the n–1 address. In LSB First mode, the first data byte is still

written to the address in the instruction header, but the second

data byte is written to the N+1 address.

SDIO

SEN

SCLK

DON’T CARE

DON’T CARE

A0

A1

A2

A3

A4

D1

D2

D3

D4

D5

D6

D7

D0

D1

D2

D3

D4

D5

D6

D7

REGISTER (N+1) DATA

REGISTER (N) DATA

INSTRUCTION HEADER (REGISTER N)

DON’T CARE

DON’T CARE

SEN

SCLK

SDIO

DON’T CARE

DON’T CARE

D0

D1

D2

D3

D4

D5

D6

D7

D0

D1

D2

D3

D4

D5

D6

D7

A0

A1

A2

A3

A4

A5

2/n1

R/nW

REGISTER (N–1) DATA

REGISTER (N) DATA

INSTRUCTION HEADER (REGISTER N)

DON’T CARE

SEN

SCLK

SDIO

DON’T CARE

DON’T CARE

DON’T CARE

R/nW

2/n1

A5

A4

A3

A2

A1

A0

D7

D6

D5

D4

D3

D2

D1

D0

REGISTER DATA

INSTRUCTION HEADER

Figure 1. SPI Write Examples a. (top) 1 Byte, MSB First Mode; b. (middle) 2 Byte, MSB First Mode;

c. (bottom) 2 Byte, LSB First Mode