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WM8962B Datasheet(PDF) 188 Page - Wolfson Microelectronics plc |
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WM8962B Datasheet(HTML) 188 Page - Wolfson Microelectronics plc |
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188 / 295 page ![]() WM8962 188 Rev 4.3 3-WIRE (SPI) CONTROL MODE The 3-wire control interface uses the CS ¯¯ , SCLK and SDA pins. In 3-wire control mode, a control word consists of 32 bits. The first bit is the read/write bit (R/W), which is followed by 15 address bits (A14 to A0) that determine which control register is accessed. The remaining 16 bits (B15 to B0) are data bits, corresponding to the 16 bits in each control register. In 3-wire mode, every rising edge of SCLK clocks in one data bit from the SDA pin. A rising edge on CS ¯¯ latches in a complete control word consisting of the last 32 bits. In Write operations (R/W=0), all SDA bits are driven by the controlling device. In Read operations (R/W=1), the SDA pin is driven by the controlling device to clock in the register address, after which the WM8962 drives the SDA pin to output the applicable data bits. During data output, the SDA pin can be configured as CMOS or Open Drain, using the SPI_CFG register bit, as described in Table 122. In Open Drain configuration, an external pull-up resistor is required to pull the SDA line high so that the logic 1 can be recognised by the master. When SPI Continuous Read mode is enabled (SPI_CONTRD = 1), the WM8962 will readback from incremental register addresses as long as CS ¯¯ is held low and SCLK is toggled. In this mode, the WM8962 will increment the readback address after the first 32 clock cycles, and will output data from the next register address, and successive register addresses, MSB first, for as long as CS ¯¯ is held low and SCLK is toggled. The 3-wire control mode timing is illustrated in Figure 70. R/W A14 A13 A12 A2 A1 SDA SCLK CS 15-bit control register address 16-bit control register data A0 B15 B14 B13 B2 B0 B1 Figure 70 3-Wire Serial Control Interface |
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