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SN65DP149 Datasheet(PDF) 21 Page - Texas Instruments |
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SN65DP149 Datasheet(HTML) 21 Page - Texas Instruments |
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21 / 54 page ![]() IN_CLKp IN_CLKn IN_D[2:0]p IN_D[2:0]n 50Q 50Q 50Q 50Q Control Block, I2C Registers Local I2C Control I2C_EN/PIN EQ_SEL/A0 PRE_SEL Data Registers SWAP PLL PLL Control SERDES VBIAS VBIAS A0 A1 EQ_SEL HDMI_SEL OUT_CLKp OUT_D[2:0]p OUT_CLKn OUT_D[2:0]n EQ EQ EQ_CTL SDA_CTL SCL_CTL VSADJ SLEW_CTL OE HDMI_SEL/A1 TERM_SEL SLEW_SEL PRE_SEL Enable TMDS TMDS ACTIVE DDC BLOCK HPD_SNK HPD_SRC 190<Q SDA_SRC SCL_SRC SDA_SNK SCL_SNK GND VDD VCC 1.1V 3.3V VREG Copyright © 2016, Texas Instruments Incorporated 21 SN65DP149, SN75DP149 www.ti.com SLLSEL2C – SEPTEMBER 2015 – REVISED JULY 2016 Product Folder Links: SN65DP149 SN75DP149 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated 8 Detailed Description 8.1 Overview The SNx5DP149 device is a Dual Mode[1] DisplayPort retiming level shifter that supports data rates up to 3.4- Gbps for HDMI1.4b. The device takes in AC coupled HDMI/DVI signals and level shifts them to TMDS signals while compensating for loss and jitter through its receiver equalizer and retiming functions. The SNx5DP149 in default configuration should meet most system needs but also provides features that allow the system implementer flexibility in design. Programming can be accomplished through I2C[4] or pin strapping. 8.2 Functional Block Diagram |
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