1

)

2

LP5550

SNVS378G – OCTOBER 2005 – REVISED APRIL 2013

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The power dissipated in the input capacitor is given by:

(6)

The input capacitor must be rated to handle both the RMS current and the dissipated power. A 10 µF ceramic

capacitor is recommended for the LP5550.

OUTPUT CAPACITOR

The switching converter in the LP5550 is designed to be used with a 10uF ceramic output capacitor. The

dielectric should be X5R, X7R, or comparable material to maintain proper tolerances. The output capacitor of the

switching converter absorbs the AC ripple current from the inductor and provides the initial response to a load

transient. The ripple voltage at the output of the converter is the product of the ripple current flowing through the

output capacitor and the impedance of the capacitor. The impedance of the capacitor can be dominated by

capacitive, resistive, or inductive elements within the capacitor, depending on the frequency of the ripple current.

Ceramic capacitors are predominately used in portable systems and have very low ESR and remain capacitive

up to high frequencies.

The switcher peak - to - peak output voltage ripple in steady state can be calculated as:

(7)

LDO INFORMATION

The LDOs included in the LP5550 provide static supply voltages for various functions in the processor. Use the

following sections to determine loading and external components.

LDO LOADING CAPABILITY

The LDOs in the LP5550 can regulate to a variety of output voltages, depending on the need of the processor.

These voltages can be programmed through the PWI. Table 2 summarizes the parameters of the LP5550 LDOs.

Table 2. LDO Parameters

Recommended

Output Voltage

Dropout Voltage

PWI Register

Maximum Output

Typical Load

Range

(typical)

Current

LDO1

R8

0.6 V – 2.2 V

100 mA

200 mV

PLL

LDO2

R7

1.5 V – 3.3 V

250 mA

150 mV

I/O

LDO3

R2

(1)

50 mA

200 mV

Memory/Memory

retention

(1)

(2)

LDO3 regulates at the set memory retention voltage when the LP5550 is in shutdown state.

LDO OUTPUT CAPACITOR

The output capacitor sets a low frequency pole and a high frequency zero in the control loop of an LDO. The

capacitance and the equivalent series resistance (ESR) of the capacitor must be within a specified range to meet

stability requirements. The LDOs in the LP5550 are designed to be used with ceramic output capacitors. The

dielectric should be X5R, X7R, or comparable material to maintain proper tolerances. Use the following table to

choose a suitable output capacitor:

Table 3. Output Capacitor Selection Guide

Output Capacitance Range

ESR range

(Recommended Typical Value)

LDO1

1 µF – 20 µF (2.2 µF)

5 mohm – 500 mohm

LDO2

2 µF – 20 µF (4.7 µF)

5 mohm – 500 mohm

LDO3

0.7 µF – 2.2 µF (1.0 µF)

5 mohm– 500 mohm

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