MCP1711 datasheet(19/36 Pages) MICROCHIP

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DS20005415C-page 19

MCP1711

3.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 3-1.

3.1

Unregulated Input Voltage (VIN)

Connect the VIN pin to the output of the unregulated

source voltage. Like all low dropout linear regulators,

low-source impedance is necessary for ensuring stable

operation of the LDO. The amount of capacitance

required to ensure low-source impedance will depend

on the proximity of the input source capacitors or bat-

tery type. For most applications, 0.1 µF of capacitance

will ensure stable operation of the LDO circuit. If the

output capacitor is used, the input capacitor should

have a capacitance value equal to or greater than the

output capacitor for performance applications.

The input capacitor will supply the load current during

transients and improve performance. For applications

that have low load currents, the input capacitance

requirement can be lowered.

The type of capacitor used may be ceramic, tantalum or

aluminum electrolytic. The low ESR characteristics of

the ceramic will yield better noise and Power Supply

Rejection

Ratio

(PSRR)

performance

high

frequency.

3.2

Ground Terminal (GND)

This is the regulator ground. Tie GND to the negative

side of the output capacitor (if used) and to the negative

side of the input capacitor. Only the LDO bias current

flows out of this pin, so there is no high current. The

LDO output regulation is referenced to this pin. Mini-

mize voltage drops between this pin and the negative

side of the load. If a PCB ground plane is not used, min-

imize the length of the trace between the GND pin and

the ground line.

3.3

Shutdown Input (SHDN)

The SHDN input is used to turn the LDO output voltage

on and off.

When the SHDN input is at logic High level, the LDO

output voltage is enabled. When the SHDN pin is pulled

to a logic Low level, the LDO output voltage is disabled.

When the SHDN pin is pulled low, the VOUT pin is

pulled down to the ground level via, parallel to the feed-

back resistors (R1 and R2), and the COUT discharge

resistance (RDCHG).

The output voltage becomes unstable when the SHDN

pin is left floating.

3.4

Not Connected Pin (NC)

The SOT-23 package has a pin that is not con-

nected.This pin should be either left floating or tied to

the ground plane.

3.5

Regulated Output Voltage (VOUT)

Connect the VOUT pin to the positive side of the load

and to the positive side of the output capacitor (if used).

The positive side of the output capacitor should be

physically located as close as possible to the LDO

VOUT pin. The current flowing out of this pin is equal to

the DC load current.

3.6

Exposed Thermal Pad (EP)

The 4-lead 1 x 1 UQFN package has an exposed metal

pad on the bottom of the package. The exposed metal

pad gives the device better thermal characteristics by

providing a good thermal path to either a PCB isolated

plane or a PCB ground plane. The exposed pad of the

package is not internally connected to GND.

TABLE 3-1:

PIN FUNCTION TABLE

MCP1711

1X1 UQFN

MCP1711

SOT-23

Symbol

Description

VIN

Unregulated Input Supply Voltage

GND

Ground Terminal

SHDN

Shutdown Input

—

Not Connected (SOT-23 only)

VOUT

Regulated Voltage Output

—

Exposed Thermal Pad (1x1 UQFN only)

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