TPS2832, TPS2833

FAST SYNCHRONOUSBUCK MOSFET DRIVERS

WITH DEADTIME CONTROL

SLVS195C − FEBRUARY 1999 − REVISED JANUARY 2001

6

POST OFFICE BOX 655303

switching characteristics over recommended operating virtual junction temperature range,

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VBOOT = 4.5 V,

VBOOTLO = 0 V

60

HIGHDR output (see Note 3)

VBOOT = 6.5 V,

VBOOTLO = 0 V

50

ns

Rise time

HIGHDR output (see Note 3)

VBOOT = 12 V,

VBOOTLO = 0 V

50

ns

Rise time

VCC = 4.5 V

40

LOWDR output (see Note 3)

VCC = 6.5 V

30

ns

LOWDR output (see Note 3)

VCC = 12 V

30

ns

VBOOT = 4.5 V,

VBOOTLO = 0 V

60

HIGHDR output (see Note 3)

VBOOT = 6.5 V,

VBOOTLO = 0 V

50

ns

Fall time

HIGHDR output (see Note 3)

VBOOT = 12 V,

VBOOTLO = 0 V

50

ns

Fall time

VCC = 4.5 V

40

LOWDR output (see Note 3)

VCC = 6.5 V

30

ns

LOWDR output (see Note 3)

VCC = 12 V

30

ns

HIGHDR going low

VBOOT = 4.5 V,

VBOOTLO = 0 V

130

HIGHDR going low

(excluding dead time) (see Note 3)

VBOOT = 6.5 V,

VBOOTLO = 0 V

100

ns

Propagation delay time

(excluding dead time) (see Note 3)

VBOOT = 12 V,

VBOOTLO = 0 V

75

ns

Propagation delay time

LOWDR going high

VBOOT = 4.5 V,

VBOOTLO = 0 V

80

LOWDR going high

(excluding dead time) (see Note 3)

VBOOT = 6.5 V,

VBOOTLO = 0 V

70

ns

(excluding dead time) (see Note 3)

VBOOT = 12 V,

VBOOTLO = 0 V

60

ns

LOWDR going low

VCC = 4.5 V

80

Propagation delay time

LOWDR going low

(excluding dead time) (see Note 3)

VCC = 6.5 V

70

ns

Propagation delay time

(excluding dead time) (see Note 3)

VCC = 12 V

60

ns

DT to LOWDR and

VCC = 4.5 V

40

170

Driver nonoverlap time

DT to LOWDR and

LOWDR to HIGHDR (see Note 3)

VCC = 6.5 V

25

135

ns

Driver nonoverlap time

LOWDR to HIGHDR (see Note 3)

VCC = 12 V

15

85

ns

NOTE 3:

Ensured by design, not production tested.