GXM datasheet(190/244 Pages) NSC

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190

Revision 3.1

Electrical Specifications (Continued)

Table 7-10. SDRAM Interface Signals

Figure 7-6. Output Valid Timing

Figure 7-7. Setup and Hold Timings - Read Data In

Symbol

Parameter

Min

Max

Unit

CNTRL* Output Valid from SDCLK[3:0]

Equation Number =

–1.5 (see below)

Equation Number =

–1.0 (see below)

MA[12:0], BA[1:0] Output Valid from

SDCLK[3:0]

Equation Number =

–1.7 (see below)

Equation Number =

–1.2 (see below)

MD[63:0] Output Valid from

SDCLK[3:0]

Equation Number =

–1.6 (see below)

Equation Number =

–0.3 (see below)

MD[63:0] Read Data in Setup to

SDCLKIN

0ns

MD[63:0] Read Data Hold to SDCLKIN

2.0

*CNTRL = RASA#, RASB# CASA#, CASB#, WEA#, WEB#, CKEA, CKEB, DQM[7:0], CS[3:0]#.

Load = 50pF, Core Vcc = 2.9, I/O Vcc = 3.3V, 25°C.

Output Valid Equation: Use Min or Max number in equation: Min# or Max# + (x * y)

Where: x = shift value applied to SHFTSDCLK field and y = (core clock period) ÷ 2

Note that SHFTSDCLK field = GX_BASE+8404h[5:3], see page 109.

Equation Example:

A 200 MHz GXm processor running a 66 MHz SDRAM bus, with a shift value of 2:

t1 Min = –1.5 + (2 * (5 ÷ 2)) = 3.5 ns

t1 Max= –1.0 +(2* (5 ÷2)) =4.0 ns

SDCLK[3:0]

CNTRL, MA[12:0],

BA[1:0], MD[63:0]

t1, t2, t3

Valid

SDCLKIN

MD[63:0]

Read Data In

Data Valid

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