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GXM Datasheet(PDF) 191 Page - National Semiconductor (TI) |
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GXM Datasheet(HTML) 191 Page - National Semiconductor (TI) |
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191 / 244 page ![]() Revision 3.1 191 www.national.com Electrical Specifications (Continued) Table 7-11. Video Interface Signals Figure 7-8. Graphics Port Timing Symbol Parameter Min Max Unit t1 PCLK Period 7.4 40 ns t2 PCLK High Time 3 ns t3 PCLK Low Time 3 ns t4 PIXEL[17:0], CRT_HSYNC, CRT_VSYNC, FP_HSYNC, FP_VSYNC, ENA_DISP Valid Delay from PCLK Rising Edge 25 ns t5 VID_CLK Period 8.5 ns t6 VID_RDY Setup to VID_CLK Rising Edge 5 ns t7 VID_RDY Hold to VID_CLK Rising Edge 2 ns t8 VID_VAL, VID_DATA[7:0] Valid Delay from VID_CLK Rising Edge 2 5 ns t9 DCLK Period 7.4 ns t10 DCLK Rise/Fall Time 3 ns tcyc DCLK Duty Cycle 40 60 % t1 t2 t3 t4 PCLK PIXEL[17:0], CRT_HSYNC, CRT_VSYNC, FP_HSYNC, FP_VSYNC, ENA_DISP |
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