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GXM Datasheet(PDF) 220 Page - National Semiconductor (TI) |
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GXM Datasheet(HTML) 220 Page - National Semiconductor (TI) |
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220 / 244 page  www.national.com 220 Revision 3.1 Instruction Set (Continued) REP OUTS Output String F3 6[111w] --------- 24+4n 24+4n\ 39+4n bh,m REP STOS Store String F3 A[101w] --------- 9+2n 9+2n b h REPE CMPS Compare String Find non-match F3 A[011w] x- - - xxxxx 11+4n 11+4n b h REPE SCAS Scan String Find non-AL/AX/EAX F3 A[111w] x- - - xxxxx 9+3n 9+3n b h REPNE CMPS Compare String Find match F2 A[011w] x- - - xxxxx 11+4n 11+4n b h REPNE SCAS Scan String Find AL/AX/EAX F2 A[111w] x- - - xxxxx 9+3n 9+3n b h RET Return from Subroutine Within Segment C3 --------- 3 3 b g,h,j,k,r Within Segment Adding Immediate to SP C2 ## 3 3 Intersegment CB 10 13 Intersegment Adding Immediate to SP CA ## 10 13 Protected Mode: Different Privilege Level -Intersegment -Intersegment Adding Immediate to SP 35 35 ROL Rotate Left Register/Memory by 1 D[000w] [mod 000 r/m] x -------x 2 2 b h Register/Memory by CL D[001w] [mod 000 r/m] u -------x 2 2 Register/Memory by Immediate C[000w] [mod 000 r/m] # u -------x 2 2 ROR Rotate Right Register/Memory by 1 D[000w] [mod 001 r/m] x -------x 2 2 b h Register/Memory by CL D[001w] [mod 001 r/m] u -------x 2 2 Register/Memory by Immediate C[000w] [mod 001 r/m] # u -------x 2 2 RSDC Restore Segment Register and Descriptor 0F 79 [mod sreg3 r/m] --------- 11 11 s s RSLDT Restore LDTR and Descriptor 0F 7B [mod 000 r/m] --------- 11 11 s s RSTS Restore TSR and Descriptor 0F 7D [mod 000 r/m] --------- 11 11 s s RSM Resume from SMM Mode 0F AA xxxxxxxxx 57 57 s s SAHF Store AH in FLAGS 9E ---- xxxxx 1 1 SAL Shift Left Arithmetic Register/Memory by 1 D[000w] [mod 100 r/m] x - - - x x u x x 1 1 b h Register/Memory by CL D[001w] [mod 100 r/m] u - - - x x u x x 2 2 Register/Memory by Immediate C[000w] [mod 100 r/m] # u - - - x x u x x 1 1 SAR Shift Right Arithmetic Register/Memory by 1 D[000w] [mod 111 r/m] x - - - x x u x x 2 2 b h Register/Memory by CL D[001w] [mod 111 r/m] u - - - x x u x x 2 2 Register/Memory by Immediate C[000w] [mod 111 r/m] # u - - - x x u x x 2 2 SBB Integer Subtract with Borrow Register to Register 1[10dw] [11 reg r/m] x - - - xxxx x 1 1 b h Register to Memory 1[100w] [mod reg r/m] 1 1 Memory to Register 1[101w] [mod reg r/m] 1 1 Immediate to Register/Memory 8[00sw] [mod 011 r/m] ### 1 1 Immediate to Accumulator (short form) 1[110w] ### 1 1 SCAS Scan String A [111w] x- - - xxxx x 2 2 b h SETB/SETNAE/SETC Set Byte on Below/Not Above or Equal/Carry To Register/Memory 0F 92 [mod 000 r/m] --------- 1 1 h SETBE/SETNA Set Byte on Below or Equal/Not Above To Register/Memory 0F 96 [mod 000 r/m] --------- 1 1 h SETE/SETZ Set Byte on Equal/Zero To Register/Memory 0F 94 [mod 000 r/m] --------- 1 1 h Table 9-27. Processor Core Instruction Set Summary (Continued) Instruction Opcode Flags Real Mode Prot’d Mode Real Mode Prot’d Mode OD I T S Z A P C FFFFFFFFF Clock Count (Reg/Cache Hit) Notes |
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