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DP7411 Datasheet(PDF) 1 Page - Copal Electronics |
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DP7411 Datasheet(HTML) 1 Page - Copal Electronics |
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1 / 16 page  DP7411 © NIDEC COPAL ELECTRONICS CORP. 1 Doc. No. MD-2114 Rev. J Characteristics subject to change without notice Dual Digital Potentiometers (DP) with 64 Taps and SPI Interface FEATURES Two linear-taper digital potentiometers 64 resistor taps per potentiometer End to end resistance 2.5k , 10k , 50k or 100k Potentiometer control and memory access via SPI interface: Mode (0, 0) and (1, 1) Low wiper resistance, typically 80 Nonvolatile memory storage for up to four wiper settings for each potentiometer Automatic recall of saved wiper settings at power up 2.5 to 6.0 volt operation Standby current less than 1µA 24-lead SOIC and 24-lead TSSOP Industrial temperature ranges PIN CONFIGURATION SOIC (W) (top view) VCC 124 NC RL0 223 NC RH0 322 NC RW0 421 NC CS ¯¯¯ 520 A0 WP ¯¯¯ 619 SO SI 718 HOLD ¯¯¯¯¯ A1 817 SCK RL1 916 NC RH1 10 15 NC RW1 11 14 NC GND 12 13 NC DP 7411 TSSOP (Y) (top view) SI 124 WP ¯¯¯ A1 223 CS ¯¯¯ RL1 322 RW0 RH1 421 RH0 RW1 520 RL0 GND 619 VCC NC 718 NC NC 817 NC NC 916 NC NC 10 15 NC SCK 11 14 A0 HOLD ¯¯¯¯¯ 12 13 SO DP 7411 DESCRIPTION The DP7411 is two Digital Potentiometers (DPs) integrated with control logic and 16 bytes of NVRAM memory. Each DP consists of a series of 63 resistive elements connected between two externally accessible end points. The tap points between each resistive element are connected to the wiper outputs with CMOS switches. A separate 6-bit control register (WCR) independently controls the wiper tap switches for each DP. Associated with each wiper control register are four 6-bit non-volatile memory data registers (DR) used for storing up to four wiper settings. Writing to the wiper control register or any of the non-volatile data registers is via a SPI serial bus. On power-up, the contents of the first data register (DR0) for each of the two potentiometers is automatically loaded into its respective wiper control register. The DP7411 can be used as a potentiometer or as a two terminal, variable resistor. It is intended for circuit level or system level adjustments in a wide variety of applications. FUNCTIONAL DIAGRAM For Ordering Information details, see page 15. RW0 RW1 RH0 SO SI SCK A0 A1 RH1 RL0 RL1 NONVOLATILE DATA REGISTERS WIPER CONTROL REGISTERS CONTROL LOGIC SPI BUS INTERFACE WP CS |
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