LM1247 datasheet(33/48 Pages) NSC

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Control Register Definitions (Continued)

Bit 0

On-Screen Display Enable. The On-Screen Display will be disabled when this bit is a zero. When this bit is a

one the On-Screen Display will be enabled. This controls both Window 1 and Window 2.

Bit 1

Display Window 1 Enable. When this bit and Bit 0 of this register are both ones, Display Window 1 is enabled.

If either bit is a zero, then Display Window 1 will be disabled.

Bit 2

Display Window 2 Enable. When this bit and Bit 0 of this register are both ones, Display Window 2 is enabled.

If either bit is a zero, then Display Window 2 will be disabled.

Bit 3

Clear Display Page RAM. Writing a one to this bit will result in setting all of the Display Page RAM values to

zero. This bit is automatically cleared after the operation is complete.

Bit 4

Transparent Disable. When this bit is a zero, a palette color of black (i.e., color palette look-up table value of

0x00) in the first 8 palette look-up table address locations (i.e., ATT0–ATT7) will be interpreted as transparent.

When this bit is a one, the color will be interpreted as black.

Bits 7–5

Reserved (Should be set to zero)

Frame Control Register 2:

FRMCTRL1 (0x8401)

Pixels per Line

Blink Period

PL[2:0]

BP[4:0]

Bits 4–0

Blinking Period. These five bits set the blinking period of the blinking feature, which is determined by

mulitiplying the value of these bits by 8, and then multiplying the result by the vertical field rate.

Bits 7–5

Pixels per Line. These three bits determine the number of pixels per line of OSD characters. See Table 21

which gives the maximum horizontal scan rate. Also see Table 3 since the maximum recommended scan rate

is also a function of the PLLFREQRNG register, 0x843E[1:0].

TABLE 21. OSD Pixels per Line

Bits 7–5

Description

Max Horizontal Frequency (kHz)

0x0

512 pixels per line

125

0x1

576 pixels per line

119

0x2

640 pixels per line

112

0x3

704 pixels per line

106

0x4

768 pixels per line

100

0x5

832 pixels per line

0x6

896 pixels per line

0x7

960 pixels per line

Character Font Access Register:

CHARFONTACC (0x8402)

Reserved

Select

Plane

XXXXX

C/A

Bit

Bit 0

This is the Color Bit Plane Selector. This bit must be set to 0 to read or write a two-color attribute from the

range 0x0000 to 0x2FFF. When reading or writing four-color attributes from the range 0x3000 to 0x3FFF, this

bit is set to 0 for the least significant plane and to 1 for the most significant plane. It is also required to set this

bit to read the individual bit planes of the four color character fonts in 0x3000 to 0x3FFF and 0x7000 to

0x7FFF.

Bit 1

This is the Character/Attribute Selector. This applies to reads from the Display Page RAM (address range

0x8000–0x81FF). When a 0, the character code is returned and when a 1, the attribute code is returned.

Bits 7–2

Reserved. These should be set to zero.

Vertical Blank Duration Register:

VBLANKDUR (0x8403)

Res’d

Vertical Blanking Duration

VB[6:0]

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