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MT9072AB Datasheet(PDF) 106 Page - Zarlink Semiconductor Inc |
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MT9072AB Datasheet(HTML) 106 Page - Zarlink Semiconductor Inc |
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106 / 275 page  MT9072 Data Sheet 106 Zarlink Semiconductor Inc. 16.4 JTAG Data Registers As specified in IEEE 1149.1, the JTAG Interface must contain as a minimum the boundary scan register and the bypass register. The device identification register although optional, is also included in the MT9072. 16.4.1 Identification Register This is a 32 bit register as defined in Table 54. Note that the part number revision is not the same as the silicon revision which is not supplied. Version Part Number Manufacturer Identity LSB=1 (4 bits) (16 bits) (11 bits) (1 bit) A 9072 Zarlink LSB=1 0000 1001 0000 0111 0010 0001 0100 101 1 0 9 0 7 2 14B 0 9 0 7 2 1 4 B Table 54 - JTAG MT9072 Identification Register |
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