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MT9072AB Datasheet(PDF) 253 Page - Zarlink Semiconductor Inc |
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MT9072AB Datasheet(HTML) 253 Page - Zarlink Semiconductor Inc |
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253 / 275 page  MT9072 Data Sheet 253 Zarlink Semiconductor Inc. Figure 45 - Receive Multiframe Timing with TX8KEn Set Functional Timing Diagram Figure 46 - Receive Multiframe Timing with TX8KEn Set Timing Diagram AC Electrical Characteristics - Receive MultiframeTiming with TX8KEn Set Characteristics Sym. Min. Typ. Max. Units Test Conditions 1RXMF Output Delay tTFOD 20 ns 150 pF AC Electrical Characteristics - Transmit Data Link Timing Characteristics Sym. Min. Typ. Max. Units Test Conditions 1 Clock Delay tCD 100 ns 150 pF load on TxDLC 2 Enable Delay tED 100 ns 150 pF load on TxDLC 3 Data Setup tDS 50 ns 150 pF load on TxDLC 4 Data Hold tDH 50 ns 150 pF load on TxDLC RxMF TPOS/TNEG Channel 23 Bit 7 Sbit Channel 0 Bit 1 Channel 0 Bit 2 TXCL (Tx8KEN= 1) TPOS/TNEG tSOD (Output) tTFOD tTFOD VTT VTT VTT tSOD RXMF (Input) TXCL (Output) |
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