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VDP313XY Datasheet(PDF) 35 Page - Micronas |
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VDP313XY Datasheet(HTML) 35 Page - Micronas |
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35 / 76 page  ADVANCE INFORMATION VDP 313xY Micronas 35 Scan Velocity Modulation 5A 9 w v video mode coefficients bit[5:0] gain1 bit[8:6] differentiator delay 1 (0= filter off, 1...6= delay) 60 4 SVM1 SVG1 SVD1 52 9 w v limiter bit[6:0] limit value bit[8:5] not used, set to “0” 100 0 SVM3 SVLIM 4E 9 w v delay and coring bit[3:0] adjustable delay, in 1/2 display clock steps, bit[7:4] coring value bit[8] not used, set to “0” 7 0 SVM4 SVDEL SVCOR Display Controls 4A 46 42 9 9 9 w v w v w v cutoff Red cutoff Green cutoff Blue 0 0 0 CR CG CB Table 2–5: I2C control and status registers of the video backend (Registers are set to ’0’ at reset, default values are recommendations) I2C Sub address Number of bits Mode Function Default Name (hex) (hex) |
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