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CM6900IP Datasheet(PDF) 7 Page - List of Unclassifed Manufacturers

Part # CM6900IP
Description  PFC/PWM COMBO w/ INRUSH CURRENT CONTROL & SEPARATED PFCOVP
PDF  19 Pages
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CM6900IP Datasheet(HTML) 7 Page - List of Unclassifed Manufacturers

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CM6900
PFC/PWM COMBO w/ INRUSH CURRENT CONTROL & SEPARATED PFCOVP
2003/04/23
Preliminary Rev. 1.2
Champion Microelectronic Corporation
Page 6
ELECTRICAL CHARACTERISTICS (Conti.) Unless otherwise stated, these specifications apply
VCCA=+15V, RT = 52.3kΩ, CT = 470pF, TA=Operating Temperature Range (Note 1)
CM6900
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
Total Variation
Line, Temp
68
84
kHz
Ramp Valley to Peak Voltage
2.5
V
PFC Dead Time (Note 4)
500
700
ns
CT Discharge Current
VRAMP2 = 0V, VRAMP1 = 2.5V
6.5
10.5
mA
Reference
Output Voltage
TA = 25℃, I(VREF) = 1mA
7.4
7.5
7.6
V
Line Regulation
11V < VCCA < 16.5V
10
25
mV
0mA < I(VREF) < 7mA; TA = 0℃~70℃
10
20
mV
Load Regulation
0mA < I(VREF) < 5mA; TA = -40℃~85℃
10
20
mV
Temperature Stability
0.4
%
Total Variation
Line, Load, Temp
7.35
7.65
V
Long Term Stability
TJ = 125℃, 1000HRs
5
25
mV
PFC
Minimum Duty Cycle
VIEAO > 4.0V
0
%
Maximum Duty Cycle
VIEAO < 1.2V
90
95
%
IOUT = -20mA at room temp
15
ohm
IOUT = -100mA at room temp
15
ohm
Output Low Rdson
IOUT = 10mA, VCCA = 9V at room temp
0.4
0.8
V
IOUT = 20mA at room temp
15
20
ohm
Output High Rdson
IOUT = 100mA at room temp
15
20
ohm
Rise/Fall Time (Note 4)
CL = 1000pF
50
ns
PWM
Duty Cycle Range
0-45
0-47
0-49.3
%
IOUT = -20mA at room temp
15
ohm
IOUT = -100mA at room temp
15
ohm
Output Low Rdson
IOUT = 10mA, VCCA = 9V
0.4
0.8
V
IOUT = 20mA at room temp
15
20
ohm
Output High Rdson
IOUT = 100mA at room temp
15
20
ohm
Rise/Fall Time (Note 4)
CL = 1000pF
50
ns
Supply
Start-Up Current
VCCA = 12V, CL = 0
100
150
µA
Operating Current
14V, CL = 0
3.0
7.0
mA
Undervoltage Lockout Threshold
CM6900
12.74
13
13.26
V
Undervoltage Lockout Hysteresis
CM6900
2.85
3.0
3.15
V
Note 1: Limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions.
Note 2: Includes all bias currents to other circuits connected to the VFB pin.
Note 3: Gain = K x 5.375V; K = (ISENSE – IOFFSET) x [IAC (VEAO – 0.625)]
-1; VEAOMAX = 6V
Note 4: Guaranteed by design, not 100% production test.



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