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MTV021 Datasheet(PDF) 2 Page - List of Unclassifed Manufacturers

Part # MTV021
Description  Enhanced Super On-Screen Display
PDF  17 Pages
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Manufacturer  ETC [List of Unclassifed Manufacturers]
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MTV021 Datasheet(HTML) 2 Page - List of Unclassifed Manufacturers

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MTV021 Revision 5.0 6/29/1999
MTV021
MYSON
TECHNOLOGY
1.0 PIN CONNECTION
2.0 PIN DESCRIPTIONS
Name
I/O
Pin No.
Descriptions
N16 N20 N24
VSSA
-
1
1
1
Analog ground. This ground pin is used to internal analog circuitry.
VCO
I/O
2
2
2
Voltage Control Oscillator. This pin is used to control the internal oscil-
lator frequency by DC voltage input from external low pass filter.
RP
I/O
3
3
3
Bias Resistor. The bias resistor is used to regulate the appropriate bias
current for internal oscillator to resonate at specific dot frequency.
VDDA
-
4
4
4
Analog power supply. Positive 5 V DC supply for internal analog cir-
cuitry. And a 0.1uF decoupling capacitor should be connected across to
VDDA and VSSA.
HFLB
I
5
5
5
Horizontal input. This pin is used to input the horizontal synchronizing
signal. It is a leading edge triggered and has an internal pull-up resistor.
SSB
I
6
6
6
Serial interface enable. It is used to enable the serial data and is also
used to select the operation of I2C or SPI bus. If this pin is left floating, I2C
bus is enabled, otherwise the SPI bus is enabled.
SDA
I
7
7
7
Serial data input. The external data transfer through this pin to internal
display registers and control registers. It has an internal pull-up resistor.
SCK
I
8
8
8
Serial clock input. The clock-input pin is used to synchronize the data
transfer. It has an internal pull-up resistor.
PWM0
O
-
9
9
Open-Drain PWM D/A converter 0. The output pulse width is program-
mable by the register of Row 15, Column 23.
PWM1
O
-
10
10
Open-Drain PWM D/A converter 1. The output pulse width is program-
mable by the register of Row 15, Column 24.
PWM2
O
-
-
11
Open-Drain PWM D/A converter 2. The output pulse width is program-
mable by the register of Row 15, Column 25.
PWM3
O
-
-
12
Open-Drain PWM D/A converter 3. The output pulse width is program-
mable by the register of Row 15, Column 26.
VSSA
VCO
RP
VDDA
HFLB
SSB
SDA
SCK
VSS
ROUT
GOUT
BOUT
FBKG
HTONE/PWMCK
VFLB
VDD
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
MTV021
VSSA
VCO
RP
VDDA
HFLB
SSB
SDA
SCK
PWM0
PWM1
PWM2
PWM3
VSS
ROUT
GOUT
BOUT
FBKG
HTONE/PWMCK
VFLB
VDD
PWM7
PWM6
PWM5
PWM4
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
MTV021N24
VSSA
VCO
RP
VDDA
HFLB
SSB
SDA
SCK
PWM0
PWM1
VSS
ROUT
GOUT
BOUT
FBKG
HTONE/PWMCK
VFLB
VDD
PWM7
PWM6
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
MTV021N20



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