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PC87310 Datasheet(PDF) 37 Page - National Semiconductor (TI) |
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PC87310 Datasheet(HTML) 37 Page - National Semiconductor (TI) |
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37 / 52 page  40 Functional Description (Continued) 45 PARALLEL PORT This parallel interface is designed to provide all of the sig- nals and registers needed to communicate through a stan- dard parallel printer port as found in the IBM PC XT AT and Centronics systems The address decoding of the regis- ters utilizing A0 and A1 is shown in Table 4-21 Table 4-22 shows the Reset states of Parallel port registers and pin signals All bits in the registers are located in the same posi- tions and have the same functions as the registers of the systems listed above These registers are shown below TABLE 4-21 Parallel Interface Register Addresses CSP A1 A0 Address Register ReadWrite 0 0 0 0 Data ReadWrite 0 0 1 1 Status Read 0 1 0 2 Control ReadWrite 0 1 1 3 TRI-STATE DATA REGISTER (DTR) TLC10591 – 15 This is a bidirectional data port that transfers 8-bit data in the direction determined by the logic state of POE pin and the RD and WR strobes STATUS REGISTER (STR) TLC10591 – 16 This register provides status for the signals listed below It is a read only register Writing to it is an invalid operation that has no effect Bits 0 1 2 These bits are always 1 Bit 3 This bit represents the current state of the printer error signal (ERROR) The printer sets this bit low when there is a printer error This bit follows the state of the ERR pin Bit 4 This bit represents the current state of the printer select signal (SLCT) The printer sets this bit high when it is selected This bit follows the state of the SLCT pin Bit 5 This bit represents the current state of the printer paper end signal (PE) The printer sets this bit high when it detects the end of the paper This bit follows the state of the PE pin Bit 6 This bit represents the current state of the printer acknowledge signal (ACK) The printer sets this signal to low after it has received a character and is ready to receive another one This bit follows the state of the ACK pin Bit 7 This bit represents the current state of the printer busy signal (BUSY) The printer sets this bit low when it is busy and cannot accept another character This bit is the inverse of the (BUSY) pin CONTROL REGISTER (CTR) TLC10591 – 17 This register provides all output signals to control the print- er This is a read and write register Bit 0 This bit directly controls the data strobe signal to the printer via the STB pin This bit is the inverse of the STB pin Bit 1 This bit directly controls the automatic feed XT signal to the printer via the AFD pin Setting this bit high causes the printer to automatically feed after each line is printed This bit is the inverse of the AFD pin Bit 2 This bit directly controls the signal to initialize the printer via the INIT pin Setting this bit to low initializes the printer This bit follows the INIT pin Bit 3 This bit directly controls the select in signal to the printer via the SLIN pin Setting this bit high selects the printer This bit is the inverse of the SLIN pin Bit 4 This bit enables the parallel port interrupt When this bit is set high the INTP signal follows the ACK signal tran- sitions Bits 5 6 7 These bits are always 1 TABLE 4-22 Parallel Port Reset Functions Register Reset Reset Signal Control State SLIN Pin MR High INIT Pin MR High AFD Pin MR High STB Pin MR High IRQ7 Pin MR TRI-STATE Normally when the Control Register is read the bit values are provided by the output latch These bit values can be superseded by the logic level of the STB AFD INIT and SLIN pins if these pins are forced high or low by an external voltage In order to force these pins high or low the corre- sponding bits should be set to their inactive state (eg AFD e STB e SLIN e 0 INIT e 1) 46 IDE HARD DISK INTERFACE CIRCUIT USING THE PC87310 SUPER IO CONTROLLER The PC87310 SuperIO controller is designed to provide a higher level of integration when interfacing to commonly used peripherals such as a floppy disk drive and communi- cations port Another key interface design that is facilitated 37 |
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