M68SDIL datasheet(79/460 Pages) MOTOROLA

79 / 460 page

Operating Modes and Resource Mapping

Internal Resource Mapping

MC68HC912D60A — Rev 3.0

Technical Data

MOTOROLA

Operating Modes and Resource Mapping

MMSWAI — Memory Mapping Interface Stop in Wait Control

This bit controls access to the memory mapping interface when in

Wait mode.

Normal modes: write anytime; special modes: write never. Read

anytime.

0 = Memory mapping interface continues to function during Wait

mode.

1 = Memory mapping interface access is shut down during Wait

mode.

5.5.2 RAM Mapping

The MC68HC912D60A has 2K byte of fully static RAM that is used for

storing instructions, variables, and temporary data during program

execution. After reset, RAM addressing begins at location $0000 but can

be assigned to any 2K byte boundary within the standard 64K byte

address space. Mapping of internal RAM is controlled by five bits in the

INITRM register.

After reset, the first 512 bytes of RAM have their access inhibited by the

presence of the register address space. After initial MCU configuration,

it is recommended to map the register space at location $0800.

RAM[15:11] — Internal RAM map position

These bits specify the upper five bits of the 16-bit RAM address.

Normal modes: write once; special modes: write anytime. Read

anytime.

Bit 7

Bit 0

RAM15

RAM14

RAM13

RAM12

RAM11

RESET:

INITRM — Initialization of Internal RAM Position Register

$0010

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

M68SDIL Datasheet(PDF) 79 Page - Motorola, Inc

M68SDIL Datasheet(HTML) 79 Page - Motorola, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL