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M68SDIL Datasheet(PDF) 82 Page - Motorola, Inc |
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M68SDIL Datasheet(HTML) 82 Page - Motorola, Inc |
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82 / 460 page ![]() Operating Modes and Resource Mapping Technical Data MC68HC912D60A — Rev 3.0 82 Operating Modes and Resource Mapping MOTOROLA RFSTR1, RFSTR0 — Register Following Stretch This two bit field determines the amount of clock stretch on accesses to the 512 byte Register Following Map. It is valid regardless of the state of the NDRF bit. In Single Chip and Peripheral Modes this bit has no meaning or effect. EXSTR1, EXSTR0 — External Access Stretch This two bit field determines the amount of clock stretch on accesses to the External Address Space. In Single Chip and Peripheral Modes this bit has no meaning or effect. ROMON28, ROMON32 — Enable bits for ROM These bits are used to enable the Flash EEPROM arrays FEE28 and FEE32 respectively. 0 = Corresponding Flash EEPROM array disabled from the memory map. 1 = Corresponding Flash EEPROM array enabled in the memory map. Table 5-3. RFSTR Stretch Bit Definition RFSTR1 RFSTR0 Number of E Clocks Stretched 00 0 01 1 10 2 11 3 Table 5-4. EXSTR Stretch Bit Definition EXSTR1 EXSTR0 Number of E Clocks Stretched 00 0 01 1 10 2 11 3 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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