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M68SDIL Datasheet(PDF) 93 Page - Motorola, Inc |
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M68SDIL Datasheet(HTML) 93 Page - Motorola, Inc |
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93 / 460 page ![]() Bus Control and Input/Output Registers MC68HC912D60A — Rev 3.0 Technical Data MOTOROLA Bus Control and Input/Output 93 RDWE — Read/Write Enable Normal: write once; Special: write anytime EXCEPT the first time. Read anytime. This bit has no effect in single-chip modes. 0 = PE2 is a general-purpose I/O pin. 1 = PE2 is configured as the R/W pin. In single chip modes, RDWE has no effect and PE2 is a general-purpose I/O pin. R/W is used for external writes. After reset in normal expanded mode, it is disabled. If needed it should be enabled before any external writes. CALE — Calibration Reference Enable Read and write anytime. 0 = Calibration reference is disabled and PE7 is general-purpose I/O in single chip or peripheral modes or if the NDBE bit is set. 1 = Calibration reference is enabled on PE7 in single chip and peripheral modes or if the NDBE bit is set. DBENE — DBE or Inverted E Clock on Port E[7] Normal modes: write once. Special modes: write anytime EXCEPT the first; read anytime. DBENE controls which signal is output on PE7 when NDBE control bit is cleared. The inverted ECLK output can be used to latch the address for demultiplexing. It has the same behaviour as the ECLK, except it is inverted. Please note that in the case of idle expansion bus, the ‘not ECLK’ signal could stay high for many cycles. The DBNE bit has no effect in single chip or peripheral modes and PE7 is defaulted to the CAL function if the CALE bit is set in the PEAR register or to an I/O otherwise. 0 = PE7 pin used for DBE external control of data enable on memories in expanded modes when NDBE = 0 1 = PE7 pin used for inverted ECLK output in expanded modes when NDBE = 0 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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