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TLE7186F Datasheet(PDF) 30 Page - Infineon Technologies AG |
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TLE7186F Datasheet(HTML) 30 Page - Infineon Technologies AG |
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30 / 39 page ![]() Data Sheet 30 Rev. 1.2, 2016-01-28 TLE7186F Description of Modes, Protection and Diagnostic Functions If the command to switch on both high and low side switches in the same half bridge is given at the input pins, the command will be ignored. The outputs will stay in the state like before the conflicting input. 9.2.11 Short Circuit Protection (SCP) The TLE7186F provides a short circuit protection for the external MOSFETs. It is monitoring the drain-source voltage of the external MOSFETs. (see Figure 3 ) The drain-source voltage monitoring for a certain external MOSFET is active as soon as the corresponding driver output stage is set to “on” and the dead time and the blanking time is expired. The blanking time starts when the dead time is expired and assures that the switch on process of the MOSFET is not taken into account. It is recommended to keep the switching times of the MOSFETs below the blanking time. The short circuit detection level is adjustable in an analogue way by the voltage setting at the SCDL pin. There is a 1:1 translation between the voltage applied to the SCDL pin and the drain-source voltage limit. E.g. to trigger the SCD circuit at 1 V drain-source voltage, the SCDL pin must be set to 1 V as well. The drain-source voltage limit can be chosen between 0.3 ... 2 V. In the case that after the expiration of the blanking time the drain source voltage of the observed MOSFET is still higher then the SCDL level, the SCD filter time t SCP starts to run. A capacitor is charged with a current. If the capacitor voltage reaches a specific level (filter time t SCP), the error signal is set and the IC goes into Error Mode. If the SCD condition is removed before the SC is detected, the capacitor is discharged with the same current. The discharging of the capacitor happens as well when the MOSFET is switched off. It has to be considered that the high side and the low side outputs of one phase are working with the same capacitor. 9.2.12 SCDL Pin Open Detection (SCDL_open) For safety reasons a pull-up resistor at the SCDL pin assures that in case of an open pin the SCDL voltage is pulled to a high level. In this case an error is set and the IC goes into Error Mode. 9.2.13 Over Current Shut Down (OCSD) The TLE7186F is monitoring the output signal of the operational amplifier. If the output signal reaches a specified level close to the upper rail (VDD) for a specified time, the System IC detects an over current condition and sets an error signal. The driver output pulls down the gate-source voltage of all external MOSFETs actively and stays in the Error Mode. 9.2.14 VDD Current Limitation The TLE7186F has an integrated voltage supply for an external µC. The output current of the supply is limited to a specified value. This limitation does not cause any error reporting. In this situation a VDD Under Voltage detection is likely. If the current is limited for a longer time, the Over Temperature protection will react. 9.2.15 Passive Gxx Clamping If VS Under Voltage Lock Out is detected or the device is in Sleep Mode, a passive clamping is active as long as the voltage at VS or VDH is higher than 3V. Even below 3V it is assured that the MOSFET driver stage will not switch on the MOSFET actively. The passive clamping means that the BHx and the VREG pin are pulled to GND with specified pull down resistors. Together with the intrinsic diode of the push stage of the output stages which connect the gate output to BHx respectively VREG, this assures that the gate of the external MOSFETs are not floating. 9.3 ERR Pin The TLE7186F has a status pin to provide diagnostic feedback to the µC. The logical output of this pin is an open drain output with integrated pull-down resistor to GND (see Figure 12). |
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