W83301 datasheet(9/16 Pages) WINBOND

9 / 16 page

Confidential

Revision 0.6

W83301R

Preliminary

7.Functional Description

7.1 Mode Selection

The W83301R supports two modes for customer’s multi-applications, as shown as

Table1, the mode A and mode B can selected via VSET0 pin. If this pin connects to 5V,

the chip will operate under mode A, otherwise the chip will operate under mode B when

VSET0 connects to ground.

Both mode A and B supports a linear switch to generate an ACPI-compliant 5VDL

voltage from ATX power supply 5V/5VSB according to S5# and S3# signals. And user

also can turn off the whole 5VDL output in S5 state via 5VDLEN# pin if needed.

Under the mode A operation, the chip provide a linear controller STR1 that drives a

N-channel MOSFET Q3 (refer to figure) to generate a regulated voltage 2.5VDUAL from an

external power source 3.3VDUAL, the 2.5 VDUAL is provide for RDRAM/DDRAM ACPI

suspend to RAM application. And In order to simply the circuit design and reduce

customer’s cost, the W83301R also integrate a bus termination controller BT driving two

external N-channel MOSFETs (Q4, Q5) to generate a specific ACPI-compliant voltage

according to a half of STR1 output for sourcing and sinking bus redundant current.

Under the mode B operation, the chip provide three linear controllers, that is STR1-

2.5VDUAL, STR2- 3.3 VDUAL, and STR3- 1.8VDUAL, all of the three outputs drive a N-

channel MOSFET (Q3, Q4, and Q5) to generate an ACPI-compliant voltage by different

applications. Such as STR1- 2.5VDUAL for clock generator application, STR2- 3.3 VDUAL

for SDRAM application, and STR3- 1.8VDUAL chipset application.

Besides, as shown in Table 1 the W83301R also provide a tri-state pin VSET1 to bias

an extra voltage up to 0.2V in each output for more performance but under mode A

operation, the BT output voltage will generated according to a half of STR1 output set by

VSET1.

Table 1. W83301R Control Table

Mode VSET0 VSET1

STR1

Bus Termination Controller

Remark

2.5VDUAL

1.25VDUAL

2.6VDUAL

1.30VDUAL

2.7VDUAL

1.35VDUAL

-STR1 output for RDRAM/DDRAM voltage

-Bus Termination Controller for memory bus

redundant current sinking and sourcing.

Mode VSET0 VSET1

STR1

STR2

STR3

Remark

2.5VDUAL

3.3VDUAL

1.8VDUAL

2.6VDUAL

3.4VDUAL

1.8VDUAL

2.7VDUAL

3.5VDUAL

1.8VDUAL

-STR1 output for Clock Gen. voltage

-STR2 output for SDRAM voltage

-STR3 output for Chipset voltage

W83301 Datasheet(PDF) 9 Page - Winbond

W83301 Datasheet(HTML) 9 Page - Winbond

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

Datasheet Download

Link URL