LAN8700I datasheet(22/74 Pages) MICROCHIP

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LAN8700/LAN8700i

DS00002260A-page 22

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Note 4-1

In RMII mode, this pin needs to tied to VSS.

Note 4-2

The RX_ER signal is optional on the RMII bus. This signal is required by the PHY, but it is optional

for the MAC. The MAC can choose to ignore or not use this signal.

4.7

Auto-negotiation

The purpose of the Auto-negotiation function is to automatically configure the PHY to the optimum link parameters

based on the capabilities of its link partner. Auto-negotiation is a mechanism for exchanging configuration information

between two link-partners and automatically selecting the highest performance mode of operation supported by both

sides. Auto-negotiation is fully defined in clause 28 of the IEEE 802.3 specification.

Once auto-negotiation has completed, information about the resolved link can be passed back to the controller via the

Serial Management Interface (SMI). The results of the negotiation process are reflected in the Speed Indication bits in

The auto-negotiation protocol is a purely physical layer activity and proceeds independently of the MAC controller.

The advertised capabilities of the PHY are stored in register 4 of the SMI registers. The default advertised by the PHY

is determined by user-defined on-chip signal options.

The following blocks are activated during an Auto-negotiation session:

• Auto-negotiation (digital)

• 100M ADC (analog)

• 100M PLL (analog)

• 100M equalizer/BLW/clock recovery (DSP)

• 10M SQUELCH (analog)

• 10M PLL (analog)

• 10M Transmitter (analog)

When enabled, auto-negotiation is started by the occurrence of one of the following events:

• Hardware reset

• Software reset

• Power-down reset

• Link status down

• Setting register 0, bit 9 high (auto-negotiation restart)

On detection of one of these events, the PHY begins auto-negotiation by transmitting bursts of Fast Link Pulses (FLP).

These are bursts of link pulses from the 10M transmitter. They are shaped as Normal Link Pulses and can pass uncor-

rupted down CAT-3 or CAT-5 cable. A Fast Link Pulse Burst consists of up to 33 pulses. The 17 odd-numbered pulses,

which are always present, frame the FLP burst. The 16 even-numbered pulses, which may be present or absent, contain

the data word being transmitted. Presence of a data pulse represents a “1”, while absence represents a “0”.

The data transmitted by an FLP burst is known as a “Link Code Word.” These are defined fully in IEEE 802.3 clause 28.

In summary, the PHY advertises 802.3 compliance in its selector field (the first 5 bits of the Link Code Word). It adver-

tises its technology ability according to the bits set in register 4 of the SMI registers.

There are 4 possible matches of the technology abilities. In the order of priority these are:

• 100M Full Duplex (Highest priority)

• 100M Half Duplex

• 10M Full Duplex

• 10M Half Duplex

If the full capabilities of the PHY are advertised (100M, Full Duplex), and if the link partner is capable of 10M and 100M,

then auto-negotiation selects 100M as the highest performance mode. If the link partner is capable of Half and Full

duplex modes, then auto-negotiation selects Full Duplex as the highest performance operation.

Once a capability match has been determined, the link code words are repeated with the acknowledge bit set. Any dif-

ference in the main content of the link code words at this time will cause auto-negotiation to re-start. Auto-negotiation

will also re-start if not all of the required FLP bursts are received.

The capabilities advertised during auto-negotiation by the PHY are initially determined by the logic levels latched on the

MODE[2:0] bus after reset completes. This bus can also be used to disable auto-negotiation on power-up.

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