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LAN8700i Datasheet(PDF) 68 Page - Microchip Technology |
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LAN8700i Datasheet(HTML) 68 Page - Microchip Technology |
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68 / 74 page ![]() LAN8700/LAN8700i DS00002260A-page 68 2007-2016 Microchip Technology Inc. APPENDIX A: DATA SHEET REVISION HISTORY TABLE A-1: REVISION HISTORY Revision Level & Date Section/Figure/Entry Correction DS00002260A (08-25-16) Replaces previous SMSC version Rev. 2.3 (04-12-11) Rev. 2.3 (04-12-11) Section 6.5, "Reset Timing," on page 56 Corrected T11.4 minimum value to 3ns. Corrected T11.3 to 2ns. Table 5-39, “Register 18 - Special Modes,” on page 38 • Updated MIIMODE bit description and added note: “When writing to this register, the default value of this bit must always be written back.” • Added note regarding default MIIMODE value. Section 4.6.3, "MII vs. RMII Configuration," on page 21 Updated section to remove information about register control of the MII/RMII mode. Section 5.4.8.2, "Far Loopback," on page 45 Updated section to remove information about register control of the MII/RMII mode. Rev. 2.2 (12-04-09) Table 6-1, "SMI Timing Values" Updated T1.2 maximum to 300ns. Rev. 2.1 (03-06-09) Section 5.4.6, "Reset" Removed reference to internal POR system. Added note the nRST should be low until VDDIO and VDD_CORE are stable. Added Figure. Table 5-34, "Register 4 - Auto Negotiation Advertisement" Corrected bit value for Asymmetric and Symmetric PAUSE. Section 6.3, "RMII 10/100Base-TX/RX Timings" Improved timing values. Section 5.4.8, "Loopback Operation" Enhanced this section. Section 4.6.3, "MII vs. RMII Configuration" Added information about register bit 18.14. Section 6.6, "Clock Circuit" Added section on clock, with crystal specification table. Figure 1-1, "LAN8700/LAN8700i System Block Diagram" Removed GPIO from the LED block. Section 4.11, "PHY Address Strapping and LED Output Polarity Selection" Removed reference to GP01 pin in third paragraph. Table 5-45, "Register 31 - PHY Special Control/Status" Renamed Bits 7-9 as Reserved. Table 5-28, "PHY Special Control/Status Register 31: Vendor-Specific" Renamed Bits 7-9 as Reserved. Rev. 2.0 (07-15-08) Section 9.0, "Package Outline, Tape and Reel" Tape and reel drawings and ordering info added. Rev. 1.9 (03-18-08) Figure 6-7, "100M RMII Transmit Timing Diagram" Replaced figure. |
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