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LAN8700i Datasheet(PDF) 46 Page - Microchip Technology |
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LAN8700i Datasheet(HTML) 46 Page - Microchip Technology |
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46 / 74 page ![]() LAN8700/LAN8700i DS00002260A-page 46 2007-2016 Microchip Technology Inc. 5.4.9 CONFIGURATION SIGNALS The PHY has 11 configuration signals whose inputs should be driven continuously, either by external logic or external pull-up/pull-down resistors. 5.4.9.1 Physical Address Bus - PHYAD[4:0] The PHYAD[4:0] signals are driven high or low to give each PHY a unique address. This address is latched into an inter- nal register at end of hardware reset. In a multi-PHY application (such as a repeater), the controller is able to manage each PHY via the unique address. Each PHY checks each management data frame for a matching address in the rel- evant bits. When a match is recognized, the PHY responds to that particular frame. The PHY address is also used to seed the scrambler. In a multi-PHY application, this ensures that the scramblers are out of synchronization and dis- perses the electromagnetic radiation across the frequency spectrum. 5.4.9.2 Mode Bus – MODE[2:0] The MODE[2:0] bus controls the configuration of the 10/100 digital block. When the nRST pin is deasserted, the register bit values are loaded according to the MODE[2:0] pins. The 10/100 digital block is then configured by the register bit values. When a soft reset occurs (bit 0.15) as described in Table 5-30, the configuration of the 10/100 digital block is controlled by the register bit values, and the MODE[2:0] pins have no affect. FIGURE 5-4: CONNECTOR LOOPBACK BLOCK DIAGRAM TABLE 5-48: MODE[2:0] BUS Mode [2:0] Mode Definitions Default Register Bit Values Register 0 Register 4 [13,12,10,8] [8,7,6,5] 000 10Base-T Half Duplex. Auto-negotiation disabled. 0000 N/A 001 10Base-T Full Duplex. Auto-negotiation disabled. 0001 N/A 010 100Base-TX Half Duplex. Auto-negotiation disabled. CRS is active during Transmit & Receive. 1000 N/A 011 100Base-TX Full Duplex. Auto-negotiation disabled. CRS is active during Receive. 1001 N/A 100 100Base-TX Half Duplex is advertised. Auto- negotiation enabled. CRS is active during Transmit & Receive. 1100 0100 101 Repeater mode. Auto-negotiation enabled. 100Base- TX Half Duplex is advertised. CRS is active during Receive. 1100 0100 Ethernet Transceiver 10/100 Ethernet MAC XFMR Digital RXD TXD Analog RX TX 1 2 3 4 5 6 7 8 RJ45 Loopback Cable. Created by connecting pin 1 to pin 3 and connecting pin 2 to pin 6. |
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