16-Bit, 2 MSPS Precision

Pseudo Differential ADC

Data Sheet

AD4000

Rev. 0

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FEATURES

Throughput: 2 MSPS maximum

INL: ±1.0 LSB maximum

Guaranteed 16-bit no missing codes

Low power

9.75 mW at 2 MSPS (VDD only)

70 µW at 10 kSPS, 14 mW at 2 MSPS (total)

SNR: 93 dB typical at 1 kHz, 90 dB typical at 100 kHz

THD: −115 dB typical at 1 kHz, −95 dB typical at 100 kHz

Ease of use features reduce system power and complexity

Input overvoltage clamp circuit

Reduced nonlinear input charge kickback

High-Z mode

Long acquisition phase

Input span compression

Fast conversion time allows low SPI clock rates

SPI-programmable modes, read/write capability, status word

Pseudo differential (single-ended) analog input range: 0 V to

Single 1.8V supply operation with 1.71V to 5.5 V logic interface

SAR architecture: no latency/pipeline delay

Guaranteed operation: −40°C to 125°C

Serial interface SPI-/QSPI-/MICROWIRE-/DSP-compatible

Ability to daisy-chain multiple ADCs and busy indicator

10-lead package: 3 mm × 3 mm LFCSP and 3 mm × 4.90 mm

MSOP

APPLICATIONS

Automatic test equipment

Machine automation

Medical equipment

Battery-powered equipment

Precision data acquisition systems

GENERAL DESCRIPTION

The AD4000 is a low noise, low power, high speed, 16-bit,

2 MSPS precision successive approximation register (SAR)

analog-to-digital converter (ADC). It incorporates ease of use

features that lower the signal chain power, reduce signal chain

complexity, and enable higher channel density. The high-Z mode,

coupled with a long acquisition phase, eliminates the need for a

dedicated high power, high speed ADC driver, thus broadening the

range of low power precision amplifiers that can drive this ADC

directly while still achieving optimum performance. The input span

compression feature enables the ADC driver amplifier and the

ADC to operate off common supply rails without the need for a

negative supply while preserving the full ADC code range. The low

serial peripheral interface (SPI) clock rate requirement reduces the

digital input/output power consumption, broadens processor

options, and simplifies the task of sending data across digital

isolation.

Operating from a 1.8 V supply, the AD4000 samples an analog

consumes only 14 mW at 2 MSPS with a minimum of 75 MHz

SCK rate in turbo mode and achieves ±1.0 LSB INL maximum,

no missing codes at 16 bits with 93 dB SNR. The reference voltage

is applied externally and can be set independently of the supply

voltage.

The SPI-compatible versatile serial interface features seven

different modes including the ability, using the SDI input, to

daisy-chain several ADCs on a single 3-wire bus and provides an

optional busy indicator. The AD4000 is compatible with 1.8 V,

2.5 V, 3 V, and 5 V logic, using the separate VIO supply.

The AD4000 is available in a 10-lead MSOP or a 10-lead LFCSP

with operation specified from −40°C to +125°C. The device is

pin compatible with the 18-bit, 2 MSPS AD4003.

FUNCTIONAL BLOCK DIAGRAM

GND

IN+

IN–

SDI

SCK

SDO

CNV

AD4000

18-BIT

SAR ADC

SERIAL

INTERFACE

VIO

REF

VDD

0

HIGH-Z

MODE

CLAMP

SPAN

COMPRESSON

TURBO

MODE

STATUS

BITS

2.5V TO 5V

1.8V

10µF

1.8V TO 5V

3-WIRE OR 4-WIRE

SPI INTERFACE

(DAISY CHAIN, CS)

Figure 1.