AD4000 datasheet(19/33 Pages) AD

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AD4000

Data Sheet

Rev. 0 | Page 18 of 32

DRIVER AMPLIFIER CHOICE

Although the AD4000 is easy to drive, the driver amplifier must

meet the following requirements:



The noise generated by the driver amplifier must be kept

low enough to preserve the SNR and transition noise

performance of the AD4000. The noise from the driver is

filtered by the single-pole, low-pass filter of the analog

input circuit made by RIN and CIN, or by the external filter,

if one is used. Because the typical noise of the AD4000 is

37 μV rms, the SNR degradation due to the amplifier is























)

(

log

LOSS

SNR

where:

f−3 dB is the input bandwidth, in megahertz, of the AD4000

(10 MHz) or the cutoff frequency of the input filter, if

one is used.

N is the noise gain of the amplifier (for example, 1 in buffer

configuration).

eN is the equivalent input noise voltage of the op amp, in

nV/√Hz.



For ac applications, the driver must have a THD perfor-

mance commensurate with the AD4000.



For multichannel multiplexed applications, the driver

amplifier and the AD4000 analog input circuit must settle

for a full-scale step onto the capacitor array at a 16-bit level

(0.0001525%, 15.25 ppm). In the data sheet of the amplifier,

settling at 0.1% to 0.01% is more commonly specified. This

time may differ significantly from the settling time at a

16-bit level and must be verified prior to driver selection.

High Frequency Input Signals

The AD4000 typical ac performance over a wide input frequency

range using a 5 V reference voltage (−0.5 dBFS) is shown in

Figure 34 and Figure 35. Unlike other traditional SAR ADCs,

the AD4000 ac performance holds up to the Nyquist frequency

with minimal performance degradation.

10k

100k

INPUT FREQUENCY (Hz)

15.2

13.2

13.4

13.6

13.8

14.0

14.2

14.4

14.6

14.8

15.0

ENOB

SINAD

SNR

Figure 34. SNR, THD, and SINAD vs. Frequency, VIO = 3.3 V, VREF = 5 V

–80

–120

–110

–115

–105

–95

–85

–100

–90

10k

100k

INPUT FREQUENCY (Hz)

120

100

105

110

115

THD

SFDR

Figure 35. THD and SFDR vs. Input Frequency, VIO = 3.3 V, VREF = 5 V

EASE OF DRIVE FEATURES

Input Span Compression

In single-supply applications, it is desirable to use the full range

of the ADC; however, the amplifier can have some headroom

and footroom requirements, which can be a problem, even if it

is a rail-to-rail input and output amplifier. The use of span

compression increases the headroom and footroom available to

the amplifier by reducing the input range by 10% from the top

and bottom of the range while still accessing all available ADC

codes (see Figure 36). The SNR decreases by approximately

1.9 dB (20 × log(4/5)) for the reduced input range when span

compression is enabled. Span compression is disabled by

default, but can be enabled by writing to the relevant register bit

(see the Digital Interface section).

ADC

VREF = 4.096V

DIGITAL OUTPUT

ALL 2N

CODES

+FSR

–FSR

90% OF VREF = 3.69V

10% OF VREF = 0.41V

ANALOG

INPUT

IN+

Figure 36. Span Compression

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