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PC-414SET Datasheet(PDF) 5 Page - List of Unclassifed Manufacturers |
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PC-414SET Datasheet(HTML) 5 Page - List of Unclassifed Manufacturers |
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5 / 14 page ![]() PC-414 ®® DATEL, Inc., Mansfield, MA 02048 (USA) • Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356 • Email: sales@datel.com • Internet: www.datel.com FUNCTIONAL SPECIFICATIONS (Typical at +25 °C, dynamic conditions, gain = 1, unless noted) PC-414F 2 Simultaneous (two A/D’s) Single Ended 0 to +10 V ±5 V ±15 V 2 µs — 1 k Ω 165 ns 20 ns ±40 ps 12 bits 400 ns ±1 ±1 ±0.1 ±0.1 2 MHz 2 MHz/chan. (2 chans.) –70 dB PC-414E 16SE/8D [Note 8] (single A/D) SE or Diff. 0 to +10 V ±10 V ±5 V ±15 V 2 µs ±10 V 100 M Ω 750 ns 20 ns ±40 ps 12 bits 500 ns ±1 ±0.75 ±0.1 ±0.1 2 MHz 500 kHz [Note 4] –72 dB PC-414B 4 (single A/D) Single Ended 0 to +10 V ±10 V ±5 V ±15 V 2 µs — 10 M Ω 750 ns 20 ns ±100 ps 14 bits 1.6 µs ±1.5 ±1 ±0.3 ±0.3 500 kHz 330 kHz –75 dB ANALOG INPUTS Number of Channels Input Configuration (non-isolated) [Note 19] Full Scale Input Ranges (user-selectable) (gain = 1) [Notes 1 & 16] Input Overvoltage (no damage, power on) Overvoltage Recovery Time, maximum Common Mode Voltage Range, maximum Input Impedance [Notes 6 &10] Acquisition Time (FSR step to 0.01% of FSR, max.) Aperture Delay Aperture Delay Uncertainty Resolution Conversion Period Integral Non-linearity (LSB of FSR) Differential Non-linearity (LSB of FSR) Full Scale Temperature Coefficient (LSB per °C) Zero or Offset Temperature Coefficient (LSB per °C) Throughput to FIFO (single channel, gain = 1) Throughput to FIFO (sequential channels, gain = 1) Total Harmonic Distortion [Note 3] PC-414D 1 (single A/D) Differential ±5 V ±15 V 2 µs ±1 V 2 k Ω 50 ns 10 ns ±7 ps 12 bits 200 ns ±2 ±1 ±0.1 ±0.3 5 MHz [Note 9] — –68 dB SAMPLE/HOLD A/D CONVERTER SYSTEM DC CHARACTERISTICS [Note 7] SYSTEM DYNAMIC PERFORMANCE [Note 2] ANALOG INPUTS Programmable Gains See Note 1 Common Mode Rejection (DC - 60 Hz) -80 dB (g = 100) (414E) Addressing Modes 1. Single channel 2. Simultaneous sampling 3. Sequential with autosequenced addressing 4. Random addressing by host software A/D CONVERTER Output Coding Positive-true, right justified, straight bin. (unipolar) or right- justified 2’s complement (bipolar) with sign extension thru bit 15 Trigger Sources 1. Local Pacer frame clock (Software selectable) 2. External TTL frame clock 3. Analog threshold comp. A/D Sample Clock 1. Internal programmable (software selectable) 82C54 timer 2. Ext. TTL input, active low Please read all notes carefully. The PC-414J in short-cycled addressing is recommended in place of the PC-414A. Model PC-414E can substitute for the PC-414C. 81 |
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