P83C180 datasheet(22/84 Pages) PHILIPS

22 / 84 page

1997 Dec 12

Philips Semiconductors

Product speciﬁcation

Microcontrollers for monitors with DDC

interface, auto-sync detection and sync proc.

P83Cx80; P87C380

10 INPUT/OUTPUT (I/O)

The P83C880 has three 8-bit ports. Ports 0 to 2 are the

same as in the 80C51, with the exception of the additional

functions of Port 1 and Port 2. Port 3 only contains 4 bits.

Port 3 also has alternative functions.

All ports are bidirectional. Pins of which the alternative

function is not used may be used as normal bidirectional

I/Os.

The use of Port 1, Port 2 and Port 3 pins as an alternative

function is carried out automatically by the P83C880

provided the associated Special Function Register bit is

set HIGH.

The quasi-bidirectional type of port is applied for Port 1,

Port 2 and Port 3. Port 0 is an open-drain I/O port with the

capability to drive LED. However, for any port with an

alternative function, while the alternative function is

performed, the port type will be switched to the appropriate

type against a specific function. The port types:

quasi-bidirectional, pull-up and open-drain are shown in

Figs 7, 8 and 9 respectively.

10.1

The alternative functions for Port 0, Port 1,

Port 2 and Port 3

Port 0 Provides the low-order address in

programming/verify mode for the P87C380.

Port 1 Used for a number of special functions:

• 2 I/O pins for I2C-bus interface: SCL/P1.0 and

SDA/P1.1. The port type in this situation is set as

open-drain.

• 2 I/O pins for DDC interface: SCL1/P1.2 and

SDA1/P1.3. The port type in this situation is set

as open-drain.

• 2 I/O pins for the outputs of sync separation:

VSYNCout/P1.4 and HSYNCout/P1.5. The port

type in this situation is set as push-pull.

• One pin for the composite sync input of sync on

green mode: CSYNCin/P1.6. There is no pull-up

protection diode for this input pin.

• One pin for the 14-bit PWM output:

PWM10/P1.7. As PWM function, the port type is

open-drain.

Port 2 Two alternative functions are provided:

• High-order address in Programming/Verify mode

for P87C380.

• 8 channels of PWM outputs:

PWM0/P2.0 to P2.7/PWM7. The port type in this

situation is set as open-drain.

Port 3 Two alternative functions are provided:

• Two channels of PWM output:

PWM8/CLAMP/P3.0 and PWM9/PATOUT/P3.1.

The port type in this situation is set as

open-drain. PATOUT and CLAMP functions

always override PWM or port function even if

they are enabled. For the PATOUT (pattern

output) and CLAMP (clamping output)

application, the port type is defined as push-pull.

• Two pins for the software ADC input: ADC0/P3.2

and ADC1/P3.3. They are analog inputs.

10.2

EMI (Electromagnetic Interference) reduction

In order to reduce EMI (Electromagnetic Interference) the

following design measures have been taken:

• Slope control is implemented on all the I/O lines with

alternative functions of the PWM, I2C-bus and DDC

interface. For port pins P1.4 and P1.5, since the

alternative functions VSYNCout and HSYNCout are

incorporated, the driving capability is made as small as

possible to reduce radiation and the slope control

function is disabled to have a sharp output. Rise and fall

time (10% to 90%) for slope control are:

trf(min) < rise/fall time < trf(max).

Refer to Chapter 27 for the detailed figures.

• Placing the VDD and VSS pins next to each other

• Double bonding of the VDD and VSS pins,

i.e. 2 bondpads for each pin

• Limiting the drive capability of clock drivers and

prechargers

• Applying slew rate controlled output drivers

• Internal decoupling of the supply of the CPU core.

P83C180 Datasheet(PDF) 22 Page - NXP Semiconductors

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