ML6652 datasheet(5/28 Pages) MICRO-LINEAR

5 / 28 page

ML6652

January 2002

Preliminary Datasheet

PIN DESCRIPTIONS (continued)

Pin No. Signal Name

I/O

Description

AD10

Sets the value of the PHY address bits 1 and 0 for accessing the Serial

Management Interface.

Note: this pin is typically read a few microseconds after power-up, if it is tied

to supplies that do not track the ML6652 power improper results will occur.

Use VCCD (pin 19) as the pull up point, do not add decoupling capacitors to

this input pin (without thoroughly understanding your PCB layout dynamics the

safest course is to make short connections and do not add decoupling

capacitors to this input pin).

PECLTP

The copper interface is selected as shown in Table 2. When twisted pair

interface is selected, the scrambler and descrambler are enabled by default

and can be disabled with a management register bit.

When using twisted pair interface, this pin also defines the maximum

supported link distance. When the 10 meters maximum link length is selected,

the input is not equalized before being sliced.

Note: this pin is typically read a few microseconds after power-up, if it is tied

to supplies that do not track the ML6652 power improper results will occur.

Use VCCD (pin 19) as the pull up point, do not add decoupling capacitors to

this input pin (without thoroughly understanding your PCB layout dynamics the

safest course is to make short connections and do not add decoupling

capacitors to this input pin).

Table 1.

Table 2.

ML6652 Datasheet(PDF) 5 Page - Micro Linear Corporation