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HMC701LP6CE Datasheet(PDF) 2 Page - Analog Devices

Part # HMC701LP6CE
Description  Fractional or Integer Modes
PDF  40 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

HMC701LP6CE Datasheet(HTML) 2 Page - Analog Devices

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For price, delivery and to place orders: Hittite Microwave Corporation, 20 Alpha Road, Chelmsford, MA 01824
Phone: 978-250-3343
Fax: 978-250-3373
Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
2
HMC701LP6CE
v09.1112
8 GHz 16-BIT FRACTIONAL-N PLL
Table 1. Electrical Specifications
Parameter
conditions / notes
Min
typ
Max
Units
Prescaler Characteristics
Max rF input Frequency (3.3V)
8
9
GHz
Max rF input Frequency (2.7 - 3.3V)
7
8
GHz
Min rF input Frequency
0.1
MHz
rF input Power
-10
-6
10
dBm
16-bit n-Divider range (integer)
32
65,535
16-bit n-Divider range (Fractional)
Fraction nominal Divide ratio varies
(-3 / +4) dynamically max
35
65,531
REF Input Characteristics
Max ref input Frequency (pin XrEFP)
250
200
MHz
Max ref input Frequency (pin XSin)
250
220
MHz
Min ref input Frequency
50 Ω Source. XSin minimum
20MHz due to phase noise degra-
dation
100
kHz
ref input Voltage range (pin XrEFP)
ac coupled
750
1000
3300
mVpp
ref input Power range (pin XSin)
-6
0
12
dBm
ref input capacitance
5
pF
14-Bit r-Divider range
1
16,383
General Description
the HMc701LP6cE is a SiGe BicMoS fractional-n PLL. the PLL includes a 8GHz 16-bit rF n-Divider, a 24-bit delta-
sigma modulator, a very low noise digital phase frequency detector (PFD), and a precision controlled charge pump.
the fractional-n PLL features an advanced delta-sigma modulator design that allows ultra-fine frequency step sizes.
the fractional-n PLL features the ability to alter both the phase-frequency detector (PFD) gain and the cycle slipping
characteristics of the PFD. this feature can reduce the time to arrive at the new frequency by 50% vs. conventional
PFDs. Ultra low in-close phase noise also allows wider loop bandwidths for faster frequency hopping.
the fractional-n PLL contains a built-in linear sweeper function, which allows it to perform frequency chirps with a
wide variety of sweep times, polarities and dwells, all with an external or automatic sweep trigger.
in addition the fractional-n PLL has a number of auxiliary clock generation modes that can be accessed via the GPo.
Electrical Specifications, TA = +25°C
VccHF = VccPrS = rVDD = +3.3V
VPPcP = Vccoa = VDDPDr = VPPDrV = VDDPD = VDDPDV = +5V
DVDD = DVDDio = DVDDQ = +3.3V
GnDDrV = GnDcP = GnDPD = GnDPDV = GnDPDr = 0V
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc.,
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106
Phone: 781-329-4700 • Order online at www.analog.com
Application Support: Phone: 1-800-ANALOG-D



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