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PC97307 Datasheet(PDF) 206 Page - National Semiconductor (TI) |
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PC97307 Datasheet(HTML) 206 Page - National Semiconductor (TI) |
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206 / 218 page  206 Device Description www.national.com 13.3.16 Parallel Port Timing TABLE 13-52. Standard Parallel Port Timing FIGURE 13-21. Parallel Port Interrupt Timing (Compatible Mode) FIGURE 13-22. Parallel Port Interrupt Timing (Extended Mode) FIGURE 13-23. Typical Parallel Port Data Exchange Symbol Parameter Conditions Typical Max Unit tPDH Port Data Hold These times are system dependent and are therefore not tested. 500 nsec tPDS Port Data Setup These times are system dependent and are therefore not tested. 500 nsec tPILa Port Active Low Interrupt, Active 33 nsec tPILia Port Active Low Interrupt, Inactive 33 nsec tPIHa Port Active High Interrupt, Active 33 nsec tPIHia Port Active High Interrupt, Inactive 33 nsec tPIz Port Active High Interrupt, TRI-STATE 33 nsec tSW Strobe Width These times are system dependent and are therefore not tested. 500 nsec tPILa tPILia ACK IRQ tPIHa tPIHia tPIHa tPIz ACK IRQ RD STR WR CTR4 = 0 (TRI-STATE) tPDS tPDH tSW BUSY ACK PD7-0 STB |
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