PC97307 datasheet(216/218 Pages) NSC

216 / 218 page

216

Glossary

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STR

Status Register of the parallel port in SPP modes.

(Logical device 4, offset 01h.)

TDR

Tape Drive Register of the Floppy Disk Controller

(FDC). (Logical device 3, offset 03h.)

THR

Transmitter Holding Register for UART1 write oper-

ations only. (Logical device 6, offset 00h, divisor

latch registers not accessible, bit 7 of LCR = 0.)

TFIFO

Test FIFO for the parallel port in Extended Capabili-

ties Port (ECP) mode 110. (Logical device 4, offset

400h.)

TSR

Internal Transmitter Shift Register for UART1.

TV-Remote Mode

See Consumer Remote Control mode.

TXDR

Transmitter Data Register for write cycles for

UART2. (Logical device 5, bank 0, offset 00h.)

TXFLV

Transmission FIFO Level for UART2. (Logical de-

vices 5, bank 2, offset 06h.)

UART

Universal Asynchronous Receiver Transmitter. The

part supports two UARTs, UART1 and UART2.

They are identical in UART modes; UART2 in-

cludes infrared and DMA support.

WDCF

WATCHDOG Conﬁguration register for Power Man-

agement module. (Logical device 8 at offset 06h.)

WDST

WATCHDOG Status register for Power Manage-

ment. (Logical device 8 at offset 07h.)

WDTO

WATCHDOG Time-Out register for Power Manage-

ment. (Logical device 8 at offset 05h.)

XDB

X-Bus Data Buffer.

PC97307 Datasheet(PDF) 216 Page - National Semiconductor (TI)

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