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LNBH24L Datasheet(PDF) 6 Page - STMicroelectronics |
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LNBH24L Datasheet(HTML) 6 Page - STMicroelectronics |
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6 / 25 page ![]() Introduction LNBH24L 6/25 Doc ID 16857 Rev 2 VoTX 22 kHz signal will be superimposed to the VoRX DC voltage to generate the LNB output 22 kHz tone (see Figure 3: LNBH24L with internal tone for DiSEqC 1.X applications). The internal 22 kHz tone generator available through the VoTX pin must be activated during the 22 kHz transmission by DSQIN pin or by the TEN bit.The DSQIN internal circuit activates the 22 kHz tone on the VoTX output with 0.5 cycles ± 25 µs delay from the TTL signal presence on the DSQIN pin, and it stops with 1 cycles ± 25 µs delay after the TTL signal is expired. The VoTX pin internal circuit must be preventively set ON by the TTX function. This can be controlled both through the TTX pin and by I²C bit. As soon as the tone transmission is expired, the VoTX must be disabled by setting the TTX to LOW. The 13 / 18 V power supply is always provided to the LNB from the VoRX pin. 2.5 PDC optional circuit for DISEQC™ 1.X applications using VoTX signal on to EXTM pin In some applications, at light output current (< 50 mA) and in case of heavy output capacitive load, the 22 kHz tone can be distorted. In this case it is possible to add the "Optional" external components shown in the typical application circuit (see Figure 4: DiSEqC 1.x using external 22 kHz tone generator source through EXTM pin ) connected between VoRX and PDC pin. This optional circuit acts as an active pull-down discharging the output capacitance only when the internal 22 kHz tone is activated. 2.6 I²C interface The main functions of the IC are controlled via I²C bus by writing 6 bits on the system register (SR 8 bits in write mode). On the same register there are 5 bits that can be read back (SR 8 bits in read mode) to provide the diagnostic flags of two internal monitoring functions (OTF, OLF) and three output voltage register status (EN, VSEL, LLC) received by the IC (see Section 2.8: Diagnostic and protection functions). In read mode there are 3 test bits (TEST1-2-3) that must be disregarded from the MCU. While, in write mode, there 2 Test bits (TEST4-5) that must be always set LOW. Each section (A/B) has two selectable I²C addresses selectable respectively, by the ADDR-A and ADDR-B pins (see Table 11: Address pins characteristics ). 2.7 Output voltage selection When the IC sections are in stand-by mode (EN bit LOW), the power blocks are disabled. When the regulator blocks are active (EN bit HIGH), the output can be logic controlled to be 13 or 18 V by mean of the VSEL bit (voltage SELect) for remote controlling of non-DiSEqC LNBs. Additionally, the LNBH24L is provided with the LLC I²C bit that increase the selected voltage value to compensate possible voltage drop along the output line. In stand-by condition (EN bit LOW) all the I²C bits and the TTX pin must be set LOW (if the TTX pin is not used it can be left floating but the TTX bit must be set LOW during the stand-by condition). 2.8 Diagnostic and protection functions The LNBH24L has two diagnostic internal functions provided via I²C bus by reading 2 bits on the system register (SR bits in read mode). The diagnostic bits are, in normal operation (no |
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