AD7771 datasheet(8/14 Pages) AD

8 / 14 page

Rev. PrC | Page 7 of 13

Parameter

Test Conditions

Comment

Min

Typ

Max

Unit

2.3V≤ IOVDD ≤3.6V

0.7× IOVDD

Input Low Voltage, VINL

1.65V≤ IOVDD ≤1.95V

0.35× IOVDD

2.3V≤ IOVDD ≤3.6V

0.4

Hysteresis2

0.2

IOVDD <2.7V

0.1

Input Currents

-10

+10

µA

LOGIC OUTPUT (DOUT/RDY, DCLK,

SDOUT, GPIO)

Output High Voltage, VOH

IOVDD ≥ 3V, ISOURCE = 1mA

0.8× IOVDD

2.3≤IOVDD< 3V, ISOURCE

500μA

0.8× IOVDD

IOVDD <2.3V, ISOURCE =

200μA

0.8× IOVDD

Output Low Voltage, VOL

IOVDD ≥3V, ISINK 2mA

0.4

2.3≤IOVDD <3V, ISINK 1mA

0.4

IOVDD < 2.3V, ISINK 100μA

0.4

Leakage Current

Floating State

-10

+10

µA

Output Capacitance

Floating State

ΣΔ Data Output Coding

2s Comp

SAR Data Output Coding

Binary

POWER SUPPLIES

All ΣΔ Channels Enabled

CMOS clock,

AVDD1x/AVDD2x/AVDD4

= 3.3v, IOVDD = 1.8v

AVDD1x − AVSS

3.0

3.6

I_AVDD1x12

Reference Buffer Pre-Q ,

VCM Enable, Internal

reference Enable

4.5

Reference Buffer Enable,

VCM Enabled, Internal

reference Enabled

Reference Buffer Disable,

VCM disabled, Internal

reference Disabled

3.5

AVDD2 – AVSS

2.2

3.6

I_AVDD2x

3.5

AVDD4 – AVSS4

AVDD1x

3.6

IAVDD4

SAR enable, 256ksps

1.6

SAR disable

0.05

AVSS-DGND

-1.8

Preliminary Technical Data

AD7771

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