Specifications with standard typeface are for T

Operating Junction Temperature range. VDD = V5 = 5V, V

Ω un-

less otherwise stated (Note 4). Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.

Symbol

Parameter

Conditions

Min

Typical

(Note

5)

Max

Units

Oscillator

F

OSC

PWM Frequency

R

Ω

255

300

345

kHz

R

Ω

500

R

Ω

200

V

RAMP

PWM Ramp Peak-to-peak

Amplitude

VIN = 4.5V

0.48

V

VIN = 15V

1.6

VIN = 28V

3.0

V

VALLEY

PWM Ramp Valley

0.8

V

∆

FOSC_VIN

Frequency Change with

VIN

VIN = 4.5V to 28V

∆

FOSC_VDD

Frequency Change with

VDD

VDD = 4.5V to 5.5V

ø

CH

Phase Shift Between

Channels

Phase from HDRV1 to HDRV2

165

180

195

deg

V

FREQ_VIN

FREQ Pin Voltage vs. VIN

0.107

V/V

System

t

on-min

Minimum ON Time

V

30

ns

VIN = 4.5V

60

70

%

D

MAX

Maximum Duty Cycle

VIN = 15V

40

50

%

VIN = 28V, VDD= 4.5V

24

30

%

Gate Drivers

R

HDRV_SOURCE

HDRV Source Impedance

HDRV Pin Current (sourcing)=

1.2A

7

Ω

R

HDRV_SINK

HDRV Sink Impedance

HDRV Pin Current (sinking) = 1A

2

Ω

R

LDRV_SOURCE

LDRV Source Impedance

LDRV Pin Current (sourcing) =

1.2A

7

Ω

R

LDRV_SINK

LDRV Sink Impedance

LDRV Pin Current (sinking) = 2A

1

Ω

t

DEAD

Cross-conduction

Protection Delay

(deadtime)

HDRV Falling to LDRV Rising

40

ns

LDRV Falling to HDRV Rising

70

Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the

device is guaranteed. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics table.

Note 2: PGND1, PGND2 and SGND are all electrically connected together on the PCB.

Note 3: ESD is applied by the human body model, which is a 100pF capacitor discharged through a 1.5 k

Ω resistor into each pin.

Note 5: Typical numbers are at 25˚C and represent the most likely norm.

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