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LM2657 Datasheet(PDF) 12 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # LM2657
Description  Dual Synchronous Buck Regulator Controller
PDF  26 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM2657 Datasheet(HTML) 12 Page - National Semiconductor (TI)

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Operation Descriptions (Continued)
START-UP AND STATE-TRANSITIONS AT LIGHT
LOADS
During startup the LM2657 is allowed to operate in SKIP
mode regardless of the voltage on the FPWM pin. Starting in
SKIP mode prevents the low-side FET from having to sink
excessive amounts of negative current during start-up. This
would occur if the output was pre-biased and the converter
operated in FPWM mode. The FB pin would sense that the
output was high and force a very low duty cycle, which would
keep the low-side FET on longer than it should be in steady
state. Without a load on the output the inductor current will
reverse and become negative. This negative inductor current
can be quite large depending on the voltage on the output
and the size of the output capacitor.
A similar situation can occur if the converter transitions from
SKIP mode to FPWM mode under a light load condition
(converter is operating below the DCM boundary). This can
occur after startup if FPWM mode is selected for use in a
light load condition or if the FPWM pin is toggled high during
normal operation at light load. The problem occurs because
in SKIP mode the converter is operating at a set duty cycle
and a lower average frequency. When the converter is
forced into FPWM mode, this represents a change to the
system. The pulse widths and frequency need to readjust
suddenly and in the process momentary imbalances can be
created. Like the case of a pre-biased load, there can be
negative surge current passing from drain to source of the
lower FET. It must be kept in mind that though the LM2657
has current limiting for current passing in the ‘positive’ direc-
tion (positive with regards to the inductor, i.e. passing from
source to drain of the lower FET), there is no limit for reverse
currents. The amount of reverse current when the FPWM pin
is toggled ‘on the fly’ can be very high. This current is
determined by several factors. One key factor is the output
capacitance. Large output capacitances will lead to higher
peak reverse currents. The reverse swing will be higher for
lighter loads because of the bigger difference between the
duty cycles/average frequency in the two modes. See Figure
5 for a plot of what happened in going from SKIP to FPWM
mode at 0A load (worst case). The peak reverse current was
as high as 3A, lasting about 0.1ms. The inductor could also
saturate severely at this point if designed for light loads. In
general, if the designer wants to toggle the FPWM pin while
the converter is operating or if FPWM mode is required for a
light load application, the low side FET and inductor should
be closely evaluated under this specific condition.
If the part is operated in FPWM mode with a light load the
user will experience lower efficiency and negative current
during the transition (as discussed). The user may also
experience a momentary drop on Vout when the transition is
made from SKIP to FPWM mode. This only occurs for no
load or very light load conditions (above the DCM boundary
there is no difference between SKIP FPWM modes).
In some cases, such as low Vout (<1.5V), a glitch may be
present on PGOOD. If this is problematic, the glitch may be
eliminated by either operating in SKIP mode or using a small
sized soft start capacitor. See the following section for se-
lecting soft start capacitors.
SOFT-START
The maximum output voltage of the error amplifier is limited
during start-up by the voltage on the 0.1µF capacitor con-
nected between the SS pin and ground. When the controller
is enabled (by taking EN pin high), the following steps may
occur. First, the SS capacitor is discharged (if it has a
pre-charge) by a 1.8 k
Ω internal resistor (R
SS_DCHG, see
Electrical Characteristics). This ensures that reset is ob-
tained. Note that reset is said to occur only when the voltage
20134712
FIGURE 4. Inductor Current in FPWM Mode
20134713
CH1: PGOOD, CH2: Vo, CH3: LDRV, CH4: IL (1A/div)
Output 1V @ 0A, VIN = 10V, L = 10µH, f = 300kHz
FIGURE 5. SKIP to FPWM ’On The Fly’
www.national.com
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