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HT45F3W Datasheet(PDF) 114 Page - Holtek Semiconductor Inc |
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HT45F3W Datasheet(HTML) 114 Page - Holtek Semiconductor Inc |
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114 / 167 page ![]() Rev. 1.50 114 De�e��e� 01� �01� Rev. 1.50 115 De�e��e� 01� �01� HT45F3W R-Type Blood Pressure Meter Flash MCU HT45F3W R-Type Blood Pressure Meter Flash MCU VOL Register Bit 7 6 5 4 3 2 1 0 Na�e VOL3 VOL� VOL1 VOL0 — — — — R/W R/W R/W R/W R/W — — — — POR 0 0 0 0 — — — — Bit7~5 VOL3~VOL1:Volumecontrol 000:16-bitDACD[15:0]=DA11,DA11,DA11,DA11,DA11,DA11,DA11,DA11~DA3 001:16-bitDACD[15:0]=DA11,DA11,DA11,DA11,DA11,DA11,DA11~DA2 010:16-bitDACD[15:0]=DA11,DA11,DA11,DA11,DA11,DA11~DA1 011:16-bitDACD[15:0]=DA11,DA11,DA11,DA11,DA11~DA0 100:16-bitDACD[15:0]=DA11,DA11,DA11,DA11~DA0,0 101:16-bitDACD[15:0]=DA11,DA11,DA11~DA0,0,0 110:16-bitDACD[15:0]=DA11,DA11~DA0,0,0,0 111:16-bitDACD[15:0]=DA11~DA0,0,0,0,0 Bit4 VOL0:unusedbit,read/writeable Thebitcanbeusedasnormalregisterbit. Bit3~0 Unimplemented,readas“0” Serial Interface – SPI0, SPI1 ThedevicecontainstwoidenticalSPIinterfaces,knownasSPI0andSPI1.TheSPIinterfaceisoften usedtocommunicatewithexternalperipheraldevicessuchassensors,FlashorEEPROMmemory devicesetc.OriginallydevelopedbyMotorola,thefourlineSPIinterfaceisasynchronousserial datainterfacethathasarelativelysimplecommunicationprotocolsimplifyingtheprogramming requirementswhencommunicatingwithexternalhardwaredevices. Thecommunicationisfullduplexandoperatesasaslave/mastertype,wherethedevicecanbe eithermasterorslave.AlthoughtheSPIinterfacespecificationcancontrolmultipleslavedevices fromasinglemaster,butthisdeviceprovidesonlyoneSnCSpin.Ifthemasterneedstocontrol multipleslavedevicesfromasinglemaster,themastercanuseanI/Opintoselecttheslavedevices. SPI Interface Operation TheSPIinterfaceisafullduplexsynchronousserialdatalink.Itisafourlineinterfacewithpin namesSnDI,SnDO,SnCKandSnCS.PinsSnDIandSnDOaretheSerialDataInputandSerial DataOutputlines,SnCKistheSerialClocklineandSnCSistheSlaveSelectline.AstheSPI interfacepinsarepin-sharedwithnormalI/Opins,theSPIinterfacemustfirstbeenabledbysetting thecorrectbitsintheSPInC0andSPInC1registers.Communicationbetweendevicesconnected totheSPIinterfaceiscarriedoutinaslave/mastermodewithalldatatransferinitiationsbeing implementedbythemaster.TheMasteralsocontrolstheclocksignal.Asthedeviceonlycontainsa singleSnCSpinonlyoneslavedevicecanbeutilized.TheSnCSpiniscontrolledbysoftware. SP I M ast er SP I S l ave Sn CK Sn DO Sn DI Sn CS Sn CK Sn DI Sn DO Sn CS SPI Master/Slave Connection |
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