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CS49530X Datasheet(PDF) 13 Page - Cirrus Logic |
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CS49530X Datasheet(HTML) 13 Page - Cirrus Logic |
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13 / 37 page ![]() CS4953xx Data Sheet 32-bit Audio Decoder DSP Family DS705F2 13 5.9 Switching Characteristics — Internal Clock Parameter Symbol Min Max Unit Internal DCLK frequency1 1. After initial power-on reset, Fdclk = Fxtal. After initial kick-start commands, the PLL is locked to max Fdclk and remains locked until the next power-on reset. Fdclk —130 MHz CS49530x-CVZ CS49531x-CQZ CS49531x-CVZ CS49530x-DVZ CS49531x-DVZ —Fxtal Fxtal Fxtal Fxtal Fxtal 150 150 150 131 131 — Internal DCLK period1 DCLKP — 7.7 ns CS49530x-CVZ CS49531x-CQZ CS49531x-CVZ CS49530x-DVZ CS49531x-DVZ —6.7 6.7 6.7 7.63 7.63 1/Fxtal 1/Fxtal 1/Fxtal 1/Fxtal 1/Fxtal — |
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